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| author | Martin Braun <martin.braun@ettus.com> | 2014-10-07 11:25:20 +0200 |
|---|---|---|
| committer | Martin Braun <martin.braun@ettus.com> | 2014-10-07 11:25:20 +0200 |
| commit | fd3e84941de463fa1a7ebab0a69515b4bf2614cd (patch) | |
| tree | 3fa721a13d41d2c0451d663a59a220a38fd5e614 /fpga/usrp1/TODO | |
| parent | 3b66804e41891e358c790b453a7a59ec7462dba4 (diff) | |
| download | uhd-fd3e84941de463fa1a7ebab0a69515b4bf2614cd.tar.gz uhd-fd3e84941de463fa1a7ebab0a69515b4bf2614cd.tar.bz2 uhd-fd3e84941de463fa1a7ebab0a69515b4bf2614cd.zip | |
Removed copy of FPGA source files.
Diffstat (limited to 'fpga/usrp1/TODO')
| -rw-r--r-- | fpga/usrp1/TODO | 23 |
1 files changed, 0 insertions, 23 deletions
diff --git a/fpga/usrp1/TODO b/fpga/usrp1/TODO deleted file mode 100644 index 76287c3d4..000000000 --- a/fpga/usrp1/TODO +++ /dev/null @@ -1,23 +0,0 @@ - - -Area Reduction -============== -Reduce one or both stages of dec/interp to max rate of 8 instead of 16 -Optimize CICs to minimize registers -Reduce width of RX CORDIC -Fix CORDIC wasted logic cells from bad synthesis -Progressively narrow x,y,z on CORDIC -16-bit wide FIFOs, split IQ/channels on other side (?) - -Enhancements -============ -Halfband filter in Spartan 3 -Muxing of inputs -Switch over to newfc -RAM interface? - -Other -===== -Capture/Transmit straight samples (no DUC/DDC) - - |