From fd3e84941de463fa1a7ebab0a69515b4bf2614cd Mon Sep 17 00:00:00 2001
From: Martin Braun <martin.braun@ettus.com>
Date: Tue, 7 Oct 2014 11:25:20 +0200
Subject: Removed copy of FPGA source files.

---
 fpga/usrp1/TODO | 23 -----------------------
 1 file changed, 23 deletions(-)
 delete mode 100644 fpga/usrp1/TODO

(limited to 'fpga/usrp1/TODO')

diff --git a/fpga/usrp1/TODO b/fpga/usrp1/TODO
deleted file mode 100644
index 76287c3d4..000000000
--- a/fpga/usrp1/TODO
+++ /dev/null
@@ -1,23 +0,0 @@
-
-
-Area Reduction
-==============
-Reduce one or both stages of dec/interp to max rate of 8 instead of 16
-Optimize CICs to minimize registers
-Reduce width of RX CORDIC
-Fix CORDIC wasted logic cells from bad synthesis
-Progressively narrow x,y,z on CORDIC
-16-bit wide FIFOs, split IQ/channels on other side (?)
-
-Enhancements
-============
-Halfband filter in Spartan 3
-Muxing of inputs
-Switch over to newfc
-RAM interface?
-
-Other
-=====
-Capture/Transmit straight samples (no DUC/DDC)
-
-
-- 
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