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| author | Humberto Jimenez <humberto.jimenez@ni.com> | 2022-02-21 16:40:40 -0600 |
|---|---|---|
| committer | Humberto Jimenez <31545256+hjimenez-ni@users.noreply.github.com> | 2022-03-15 08:49:25 -0500 |
| commit | 232a9a7345f0264602caba0caf2b96dd0856aed6 (patch) | |
| tree | f475c37f111750cd5bfbc968c66b6942e66df48f /fpga/.ci/templates/job-run-testbenches.yml | |
| parent | 4fc2e3beeed4759dc108a670350276ae5554e072 (diff) | |
| download | uhd-232a9a7345f0264602caba0caf2b96dd0856aed6.tar.gz uhd-232a9a7345f0264602caba0caf2b96dd0856aed6.tar.bz2 uhd-232a9a7345f0264602caba0caf2b96dd0856aed6.zip | |
fpga: ci: Add stages-based pipeline
Diffstat (limited to 'fpga/.ci/templates/job-run-testbenches.yml')
| -rw-r--r-- | fpga/.ci/templates/job-run-testbenches.yml | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/fpga/.ci/templates/job-run-testbenches.yml b/fpga/.ci/templates/job-run-testbenches.yml new file mode 100644 index 000000000..6f6ef142b --- /dev/null +++ b/fpga/.ci/templates/job-run-testbenches.yml @@ -0,0 +1,40 @@ +# +# Copyright 2022 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# +# Description: +# +# This template is used to run all the testbenches using ModelSim. +# + + +jobs: +- job: + displayName: "ModelSim Simulation" + timeoutInMinutes: 360 + pool: + name: Hardware + variables: + - group: sdr-pipeline-vars + steps: + - checkout: self + clean: true + persistCredentials: true + + - checkout: hwtools + clean: true + path: s/hwtools/head + persistCredentials: true + + - bash: | + source $(Build.SourcesDirectory)/uhddev/fpga/.ci/scripts/run_setup.sh ./top/x300 + + echo "---- Run testbenches ----" + pushd ./tools/utils + python3 ./run_testbenches.py --logged --simulator modelsim --excludes=modelsim.excludes -j2 run + popd + workingDirectory: uhddev/fpga/usrp3 + env: + PATCHES_PATH: $(sdr-vivado-patches) + displayName: "Run Testbenches" |