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author | Paul David <paul.david@ettus.com> | 2017-03-14 19:27:22 -0400 |
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committer | Martin Braun <martin.braun@ettus.com> | 2017-06-30 10:50:37 -0700 |
commit | 3c6f37019ee1f9564644534d5a932fd03c0e6d25 (patch) | |
tree | 5253b9c1fc9147556f0bdcde5010beda72636c9f /firmware | |
parent | 51aa599d0c42bfe9b9bcf5b465b1e0acc503156b (diff) | |
download | uhd-3c6f37019ee1f9564644534d5a932fd03c0e6d25.tar.gz uhd-3c6f37019ee1f9564644534d5a932fd03c0e6d25.tar.bz2 uhd-3c6f37019ee1f9564644534d5a932fd03c0e6d25.zip |
X3xx: Updated firmware to support reading FPGA image data
Diffstat (limited to 'firmware')
-rw-r--r-- | firmware/usrp3/x300/x300_main.c | 41 |
1 files changed, 40 insertions, 1 deletions
diff --git a/firmware/usrp3/x300/x300_main.c b/firmware/usrp3/x300/x300_main.c index 459f7b0b1..3de9283eb 100644 --- a/firmware/usrp3/x300/x300_main.c +++ b/firmware/usrp3/x300/x300_main.c @@ -1,4 +1,4 @@ -// Copyright 2013-2014 Ettus Research LLC +// Copyright 2013-2017 Ettus Research #include "x300_init.h" #include "x300_defs.h" @@ -188,6 +188,44 @@ void handle_udp_fpga_prog( } /*********************************************************************** + * Handler for FPGA image reading packets + **********************************************************************/ +void handle_udp_fpga_read( + const uint8_t ethno, + const struct ip_addr *src, const struct ip_addr *dst, + const uint16_t src_port, const uint16_t dst_port, + const void *buff, const size_t num_bytes +) +{ + const x300_fpga_read_t *request = (const x300_fpga_read_t *) buff; + x300_fpga_read_reply_t reply = {0}; + bool status = true; + + if (buff == NULL) { + return; + } else if (num_bytes < offsetof(x300_fpga_read_t, size)) { + reply.flags |= X300_FPGA_READ_FLAGS_ERROR; + } else { + if (request->flags & X300_FPGA_READ_FLAGS_INIT) { + STATUS_MERGE(chinch_flash_init(), status); + } else if (request->flags & X300_FPGA_READ_FLAGS_CLEANUP) { + chinch_flash_cleanup(); + } else { + reply.flags |= X300_FPGA_READ_FLAGS_ACK; + reply.sector = request->sector; + reply.index = request->index; + reply.size = request->size; + + STATUS_MERGE(chinch_flash_select_sector(request->sector), status); + STATUS_MERGE(chinch_flash_read_buf(request->index*2, reply.data, request->size), status); + } + } + + if (!status) reply.flags |= X300_FPGA_READ_FLAGS_ERROR; + u3_net_stack_send_udp_pkt(ethno, src, dst_port, src_port, &reply, sizeof(reply)); +} + +/*********************************************************************** * Handler for MTU detection **********************************************************************/ void handle_udp_mtu_detect( @@ -411,6 +449,7 @@ int main(void) u3_net_stack_register_udp_handler(X300_FW_COMMS_UDP_PORT, &handle_udp_fw_comms); u3_net_stack_register_udp_handler(X300_VITA_UDP_PORT, &handle_udp_prog_framer); u3_net_stack_register_udp_handler(X300_FPGA_PROG_UDP_PORT, &handle_udp_fpga_prog); + u3_net_stack_register_udp_handler(X300_FPGA_READ_UDP_PORT, &handle_udp_fpga_read); u3_net_stack_register_udp_handler(X300_MTU_DETECT_UDP_PORT, &handle_udp_mtu_detect); uint32_t last_cronjob = 0; |