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author | Josh Blum <josh@joshknows.com> | 2011-03-15 10:28:16 -0700 |
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committer | Josh Blum <josh@joshknows.com> | 2011-03-15 10:28:16 -0700 |
commit | 77481462d160e00ca6664bbbacad90a3253e47eb (patch) | |
tree | c77fe3f82e0841f15cec7bc7c458afa680ce8730 /firmware/zpu/usrp2p/slave_base.h | |
parent | b3d6f86d38f8e7d9d06f8c057614fd034b78ef86 (diff) | |
download | uhd-77481462d160e00ca6664bbbacad90a3253e47eb.tar.gz uhd-77481462d160e00ca6664bbbacad90a3253e47eb.tar.bz2 uhd-77481462d160e00ca6664bbbacad90a3253e47eb.zip |
usrp2: common memory map, define slave bases in different headers
Diffstat (limited to 'firmware/zpu/usrp2p/slave_base.h')
-rw-r--r-- | firmware/zpu/usrp2p/slave_base.h | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/firmware/zpu/usrp2p/slave_base.h b/firmware/zpu/usrp2p/slave_base.h new file mode 100644 index 000000000..3c1c19bf9 --- /dev/null +++ b/firmware/zpu/usrp2p/slave_base.h @@ -0,0 +1,37 @@ +// +// Copyright 2011 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + +#ifndef INCLUDED_SLAVE_BASE_H +#define INCLUDED_SLAVE_BASE_H + +#define BOOTRAM_BASE 0x0000 +#define ROUTER_RAM_BASE 0x4000 +#define SPI_BASE 0x6000 +#define I2C_BASE 0x6100 +#define GPIO_BASE 0x6200 +#define ROUTER_STATUS_BASE 0x6300 +#define ETH_BASE 0x6400 +#define MISC_OUTPUT_BASE 0x5000 +#define PIC_BASE 0x6500 +#define UART_BASE 0x6700 +#define ATR_BASE 0x6800 +#define ICAP_BASE 0x6A00 +#define SPIF_BASE 0x6B00 +#define RAM_BASE 0x8000 + +#endif + |