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author | patrick-here <patrick.connolly@ettus.com> | 2016-01-18 11:03:05 -0800 |
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committer | Ashish Chaudhari <ashish@ettus.com> | 2016-01-18 15:57:49 -0800 |
commit | 79c20e228dc05d1e0cfa1472f72bf31906213350 (patch) | |
tree | 6eac0262407bf9faa72b3f46a32d8c9f859a587d /firmware/usrp3 | |
parent | 4e583460be6b107b9cc95be38b01266ba8c3198f (diff) | |
download | uhd-79c20e228dc05d1e0cfa1472f72bf31906213350.tar.gz uhd-79c20e228dc05d1e0cfa1472f72bf31906213350.tar.bz2 uhd-79c20e228dc05d1e0cfa1472f72bf31906213350.zip |
x300: Fixes bug#768 and a firmware hang issue with Eth Port 0 with the XGS image
Diffstat (limited to 'firmware/usrp3')
-rw-r--r-- | firmware/usrp3/lib/ethernet.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/firmware/usrp3/lib/ethernet.c b/firmware/usrp3/lib/ethernet.c index 743aedf68..e9c18528d 100644 --- a/firmware/usrp3/lib/ethernet.c +++ b/firmware/usrp3/lib/ethernet.c @@ -312,10 +312,9 @@ static void xge_mac_init(const uint32_t base) } // base is pointer to XGE MAC on Wishbone. -static void xge_phy_init(const uint8_t eth, const uint32_t mdio_port_arg) +static void xge_phy_init(const uint8_t eth, const uint32_t mdio_port) { int x; - uint32_t mdio_port = eth==0 ? 1 : mdio_port_arg; // Read LASI Ctrl register to capture state. //y = xge_read_mdio(0x9002,XGE_MDIO_DEVICE_PMA,XGE_MDIO_ADDR_PHY_A); UHD_FW_TRACE(DEBUG, "Begining XGE PHY init sequence."); @@ -323,8 +322,10 @@ static void xge_phy_init(const uint8_t eth, const uint32_t mdio_port_arg) x = read_mdio(eth, 0x0, XGE_MDIO_DEVICE_PMA,mdio_port); x = x | (1 << 15); write_mdio(eth, 0x0,XGE_MDIO_DEVICE_PMA,mdio_port,x); + uint32_t loopCount = 0; while(x&(1<<15)) { x = read_mdio(eth, 0x0,XGE_MDIO_DEVICE_PMA,mdio_port); + if( loopCount++ > 200 ) break; // usually succeeds after 22 or 23 polls } } |