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authorNicholas Corgan <nick.corgan@ettus.com>2014-07-17 11:50:50 -0700
committerNicholas Corgan <nick.corgan@ettus.com>2014-07-23 07:37:32 -0700
commita6e18604befdb6a954542f7722c8d55424065621 (patch)
tree22168e6f4c41c931e38ccd07ff8881b56c8cd88a /firmware/octoclock/include/clkdist.h
parent7423d1691fff3af08f8e42e3e09d8c8d9ec99fe8 (diff)
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OctoClock firmware upgrade, added host driver
* OctoClock can communicate with UHD over Ethernet * Can read NMEA strings from GPSDO and send to host * Added multi_usrp_clock class for clock devices * uhd::device can now filter to return only USRP devices or clock devices * New OctoClock bootloader can accept firmware download over Ethernet * Added octoclock_burn_eeprom,octoclock_firmware_burner utilities * Added test_clock_synch example to show clock API
Diffstat (limited to 'firmware/octoclock/include/clkdist.h')
-rw-r--r--firmware/octoclock/include/clkdist.h51
1 files changed, 51 insertions, 0 deletions
diff --git a/firmware/octoclock/include/clkdist.h b/firmware/octoclock/include/clkdist.h
new file mode 100644
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+++ b/firmware/octoclock/include/clkdist.h
@@ -0,0 +1,51 @@
+/*
+ * Copyright 2014 Ettus Research LLC
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _CLKDIST_H_
+#define _CLKDIST_H_
+
+#include <stdbool.h>
+
+#include <octoclock.h>
+
+typedef enum {
+ Reg0, Reg1, Reg2, Reg3, Reg4, Reg5, Reg6, Reg7,
+ Reg8_Status_Control,
+ Read_Command=0xE,
+ RAM_EEPROM_Unlock=0x1F,
+ RAM_EEPROM_Lock=0x3f
+} CDCE18005;
+
+typedef enum {
+ Primary_GPS,
+ Secondary_Ext
+} TI_Input_10_MHz;
+
+typedef enum {
+ Lo,
+ Hi
+} Levels;
+
+void setup_TI_CDCE18005(TI_Input_10_MHz which_input);
+
+void reset_TI_CDCE18005(void);
+
+uint32_t get_TI_CDCE18005(CDCE18005 which_register);
+
+bool check_TI_CDCE18005(TI_Input_10_MHz which_input, CDCE18005 which_register);
+
+#endif /* _CLKDIST_H_ */