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authorAshish Chaudhari <ashish@ettus.com>2014-08-01 13:14:56 -0700
committerAshish Chaudhari <ashish@ettus.com>2014-08-01 13:14:56 -0700
commitc7274790a0b8a812d731320c2b7711efa2e1daa7 (patch)
treea4e341ffb7e441cf92d903c7dcb263aacf43d9ca /firmware/fx3/ad9361/include
parent9eb403f4299ea036a8fff2dc22209d3ae06374ed (diff)
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b200: Moved AD9361 driver to host
- Switched to FPGA SPI engine - Moved firmware AD9361 driver to UHD - Bumped FW compat to 5, FPGA compat to 4 - Known Issue: AD9361 SPI rate is too slow
Diffstat (limited to 'firmware/fx3/ad9361/include')
-rw-r--r--firmware/fx3/ad9361/include/ad9361_transaction.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/firmware/fx3/ad9361/include/ad9361_transaction.h b/firmware/fx3/ad9361/include/ad9361_transaction.h
index 2349a5d3d..819d230c7 100644
--- a/firmware/fx3/ad9361/include/ad9361_transaction.h
+++ b/firmware/fx3/ad9361/include/ad9361_transaction.h
@@ -12,7 +12,7 @@ extern "C" {
#endif
//various constants
-#define AD9361_TRANSACTION_VERSION 0x4
+#define AD9361_TRANSACTION_VERSION 0x5
#define AD9361_DISPATCH_PACKET_SIZE 64
//action types
@@ -53,6 +53,9 @@ typedef struct
//sequence number - increment every call for sanity
uint32_t sequence;
+ //location info for the ad9361 chip class
+ uint64_t handle;
+
//action tells us what to do, see AD9361_ACTION_*
uint32_t action;