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author | Nick Foster <nick@nerdnetworks.org> | 2010-11-10 12:15:35 -0800 |
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committer | Nick Foster <nick@nerdnetworks.org> | 2010-11-10 12:15:35 -0800 |
commit | fb0cdbc553d288402ee7939dc72f4368eb9e8e1b (patch) | |
tree | e20003155af08428448a7834a82d259f3b68717d /firmware/fx2/src/usrp1/fpga_rev2.h | |
parent | 8fe1e7b29aacce7f75ae36e81706bbde02749b97 (diff) | |
parent | 8c434f7d63aca25b55d6d13dffcc1d7037261d4f (diff) | |
download | uhd-fb0cdbc553d288402ee7939dc72f4368eb9e8e1b.tar.gz uhd-fb0cdbc553d288402ee7939dc72f4368eb9e8e1b.tar.bz2 uhd-fb0cdbc553d288402ee7939dc72f4368eb9e8e1b.zip |
Merge branch 'master' of ettus.sourcerepo.com:ettus/uhdpriv into usrp2p-next
Conflicts:
firmware/microblaze/lib/u2_init.c
host/lib/usrp/usrp2/clock_ctrl.cpp
host/lib/usrp/usrp2/fw_common.h
host/lib/usrp/usrp2/mboard_impl.cpp
host/lib/usrp/usrp2/usrp2_iface.cpp
host/lib/usrp/usrp2/usrp2_iface.hpp
Diffstat (limited to 'firmware/fx2/src/usrp1/fpga_rev2.h')
-rw-r--r-- | firmware/fx2/src/usrp1/fpga_rev2.h | 58 |
1 files changed, 0 insertions, 58 deletions
diff --git a/firmware/fx2/src/usrp1/fpga_rev2.h b/firmware/fx2/src/usrp1/fpga_rev2.h deleted file mode 100644 index 54ec3f9fa..000000000 --- a/firmware/fx2/src/usrp1/fpga_rev2.h +++ /dev/null @@ -1,58 +0,0 @@ -/* - * USRP - Universal Software Radio Peripheral - * - * Copyright (C) 2003,2004 Free Software Foundation, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 3 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA - */ - -#ifndef INCLUDED_FPGA_REV1_H -#define INCLUDED_FPGA_REV1_H - -void fpga_set_reset (unsigned char v); -void fpga_set_tx_enable (unsigned char v); -void fpga_set_rx_enable (unsigned char v); -void fpga_set_tx_reset (unsigned char v); -void fpga_set_rx_reset (unsigned char v); - -unsigned char fpga_has_room_for_packet (void); -unsigned char fpga_has_packet_avail (void); - -#if (UC_BOARD_HAS_FPGA) -/* - * return TRUE iff FPGA internal fifo has room for 512 bytes. - */ -#define fpga_has_room_for_packet() (GPIFREADYSTAT & bmFPGA_HAS_SPACE) - -/* - * return TRUE iff FPGA internal fifo has at least 512 bytes available. - */ -#define fpga_has_packet_avail() (GPIFREADYSTAT & bmFPGA_PKT_AVAIL) - -#else /* no FPGA on board. fake it. */ - -#define fpga_has_room_for_packet() TRUE -#define fpga_has_packet_avail() TRUE - -#endif - -#define fpga_clear_flags() \ - do { \ - USRP_PE |= bmPE_FPGA_CLR_STATUS; \ - USRP_PE &= ~bmPE_FPGA_CLR_STATUS; \ - } while (0) - - -#endif /* INCLUDED_FPGA_REV1_H */ |