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authorJosh Blum <josh@joshknows.com>2010-11-05 13:53:39 -0700
committerJosh Blum <josh@joshknows.com>2010-11-05 13:53:39 -0700
commit3ac3457184bc3b251ce7398eee56c931983abe65 (patch)
tree7cfa1ba616788ad083236272a323c3a6e2964da3 /firmware/fx2/src/common
parent144ebf29327981db8422049b451852744619678d (diff)
parentc473cc56fafcb47d6ba1f16e8c9fb89ff6c57bca (diff)
downloaduhd-3ac3457184bc3b251ce7398eee56c931983abe65.tar.gz
uhd-3ac3457184bc3b251ce7398eee56c931983abe65.tar.bz2
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Merge branch 'good_stuff' into mb_eeprom
Conflicts: firmware/fx2/include
Diffstat (limited to 'firmware/fx2/src/common')
-rw-r--r--firmware/fx2/src/common/.gitignore17
-rw-r--r--firmware/fx2/src/common/Makefile.am50
-rw-r--r--firmware/fx2/src/common/_startup.a5180
-rw-r--r--firmware/fx2/src/common/_startup.a51.brittle78
-rw-r--r--firmware/fx2/src/common/blink_leds.c36
-rwxr-xr-xfirmware/fx2/src/common/build_eeprom.py107
-rw-r--r--firmware/fx2/src/common/check_mdelay.c37
-rw-r--r--firmware/fx2/src/common/check_udelay.c37
-rwxr-xr-xfirmware/fx2/src/common/edit-gpif114
-rw-r--r--firmware/fx2/src/common/fpga.h31
-rw-r--r--firmware/fx2/src/common/fpga_load.c193
-rw-r--r--firmware/fx2/src/common/fpga_load.h28
-rwxr-xr-xfirmware/fx2/src/common/gpif.c292
-rwxr-xr-xfirmware/fx2/src/common/gpif.gpfbin5281 -> 0 bytes
-rw-r--r--firmware/fx2/src/common/init_gpif.c59
-rw-r--r--firmware/fx2/src/common/usrp_common.c109
-rw-r--r--firmware/fx2/src/common/usrp_globals.h32
-rw-r--r--firmware/fx2/src/common/vectors.a51180
18 files changed, 0 insertions, 1480 deletions
diff --git a/firmware/fx2/src/common/.gitignore b/firmware/fx2/src/common/.gitignore
deleted file mode 100644
index d46c52c00..000000000
--- a/firmware/fx2/src/common/.gitignore
+++ /dev/null
@@ -1,17 +0,0 @@
-/*.ihx
-/*.lnk
-/*.lst
-/*.map
-/*.mem
-/*.rel
-/*.rst
-/*.sym
-/blink_leds.asm
-/usrp_common.asm
-/command_loop.asm
-/fpga.asm
-/*.asm
-/usrp_gpif.c
-/usrp_gpif_inline.h
-/Makefile
-/Makefile.in
diff --git a/firmware/fx2/src/common/Makefile.am b/firmware/fx2/src/common/Makefile.am
deleted file mode 100644
index 95232324d..000000000
--- a/firmware/fx2/src/common/Makefile.am
+++ /dev/null
@@ -1,50 +0,0 @@
-#
-# Copyright 2004 Free Software Foundation, Inc.
-#
-# This file is part of GNU Radio
-#
-# GNU Radio is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 3, or (at your option)
-# any later version.
-#
-# GNU Radio is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with GNU Radio; see the file COPYING. If not, write to
-# the Free Software Foundation, Inc., 51 Franklin Street,
-# Boston, MA 02110-1301, USA.
-#
-
-EXTRA_DIST = \
- _startup.a51 \
- blink_leds.c \
- check_mdelay.c \
- check_udelay.c \
- edit-gpif \
- fpga.h \
- fpga_load.h \
- fpga_load.c \
- gpif.c \
- gpif.gpf \
- init_gpif.c \
- usrp_common.c \
- usrp_globals.h \
- vectors.a51 \
- build_eeprom.py
-
-all: usrp_gpif.c
-
-usrp_gpif.c usrp_gpif_inline.h : gpif.c
- srcdir=$(srcdir) $(PYTHON) $(srcdir)/edit-gpif $(srcdir)/gpif.c usrp_gpif.c usrp_gpif_inline.h
-
-CLEANFILES = \
- *.ihx *.lnk *.lst *.map *.mem *.rel *.rst *.sym *.asm *.lib \
- usrp_gpif.c usrp_gpif_inline.h
-
-DISTCLEANFILES = \
- *.ihx *.lnk *.lst *.map *.mem *.rel *.rst *.sym *.asm *.lib \
- usrp_gpif.c usrp_gpif_inline.h
diff --git a/firmware/fx2/src/common/_startup.a51 b/firmware/fx2/src/common/_startup.a51
deleted file mode 100644
index 30a907857..000000000
--- a/firmware/fx2/src/common/_startup.a51
+++ /dev/null
@@ -1,80 +0,0 @@
-;;; -*- asm -*-
-;;;
-;;; Copyright 2003,2004 Free Software Foundation, Inc.
-;;;
-;;; This file is part of GNU Radio
-;;;
-;;; GNU Radio is free software; you can redistribute it and/or modify
-;;; it under the terms of the GNU General Public License as published by
-;;; the Free Software Foundation; either version 3, or (at your option)
-;;; any later version.
-;;;
-;;; GNU Radio is distributed in the hope that it will be useful,
-;;; but WITHOUT ANY WARRANTY; without even the implied warranty of
-;;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-;;; GNU General Public License for more details.
-;;;
-;;; You should have received a copy of the GNU General Public License
-;;; along with GNU Radio; see the file COPYING. If not, write to
-;;; the Free Software Foundation, Inc., 51 Franklin Street,
-;;; Boston, MA 02110-1301, USA.
-
-
-;;; The default external memory initialization provided by sdcc is not
-;;; appropriate to the FX2. This is derived from the sdcc code, but uses
-;;; the FX2 specific _MPAGE sfr.
-
-
- ;; .area XISEG (XDATA) ; the initialized external data area
- ;; .area XINIT (CODE) ; the code space consts to init XISEG
- .area XSEG (XDATA) ; zero initialized xdata
- .area USBDESCSEG (XDATA) ; usb descriptors
-
-
- .area CSEG (CODE)
-
- ;; sfr that sets upper address byte of MOVX using @r0 or @r1
- _MPAGE = 0x0092
-
-__sdcc_external_startup::
- ;; This system is now compiled with the --no-xinit-opt
- ;; which means that any initialized XDATA is handled
- ;; inline by code in the GSINIT segs emitted for each file.
- ;;
- ;; We zero XSEG and all of the internal ram to ensure
- ;; a known good state for uninitialized variables.
-
-; _mcs51_genRAMCLEAR() start
- mov r0,#l_XSEG
- mov a,r0
- orl a,#(l_XSEG >> 8)
- jz 00002$
- mov r1,#((l_XSEG + 255) >> 8)
- mov dptr,#s_XSEG
- clr a
-
-00001$: movx @dptr,a
- inc dptr
- djnz r0,00001$
- djnz r1,00001$
-
- ;; We're about to clear internal memory. This will overwrite
- ;; the stack which contains our return address.
- ;; Pop our return address into DPH, DPL
-00002$: pop dph
- pop dpl
-
- ;; R0 and A contain 0. This loop will execute 256 times.
- ;;
- ;; FWIW the first iteration writes direct address 0x00,
- ;; which is the location of r0. We get lucky, we're
- ;; writing the correct value (0)
-
-00003$: mov @r0,a
- djnz r0,00003$
-
- push dpl ; restore our return address
- push dph
-
- mov dpl,#0 ; indicate that data init is still required
- ret
diff --git a/firmware/fx2/src/common/_startup.a51.brittle b/firmware/fx2/src/common/_startup.a51.brittle
deleted file mode 100644
index 2996275cf..000000000
--- a/firmware/fx2/src/common/_startup.a51.brittle
+++ /dev/null
@@ -1,78 +0,0 @@
-;;; -*- asm -*-
-;;;
-;;; Copyright 2003 Free Software Foundation, Inc.
-;;;
-;;; This file is part of GNU Radio
-;;;
-;;; GNU Radio is free software; you can redistribute it and/or modify
-;;; it under the terms of the GNU General Public License as published by
-;;; the Free Software Foundation; either version 3, or (at your option)
-;;; any later version.
-;;;
-;;; GNU Radio is distributed in the hope that it will be useful,
-;;; but WITHOUT ANY WARRANTY; without even the implied warranty of
-;;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-;;; GNU General Public License for more details.
-;;;
-;;; You should have received a copy of the GNU General Public License
-;;; along with GNU Radio; see the file COPYING. If not, write to
-;;; the Free Software Foundation, Inc., 51 Franklin Street,
-;;; Boston, MA 02110-1301, USA.
-
-
-;;; The default external memory initialization provided by sdcc is not
-;;; appropriate to the FX2. This is derived from the sdcc code, but uses
-;;; the FX2 specific _MPAGE sfr.
-
-
- .area XISEG (XDATA) ; the initialized external data area
- .area XINIT (CODE) ; the code space consts to init XISEG
- .area XSEG (XDATA) ; zero initialized xdata
- .area USBDESCSEG (XDATA); usb descriptors
-
-
- ;; BIG TIME KLUDGE!
- ;; Look at usrp_main.rst and count the bytes from our
- ;; "normal return location" to the first instruction following
- ;; the comment: "_mcs51_getRAMCLEAR () start"
-
- INSTRUCTION_BYTES_TO_SKIP = 0x29 ; valid for sdcc 2.4.0
-
-
- .area CSEG (CODE)
-
- ;; sfr that sets upper address byte of MOVX using @r0 or @r1
- _MPAGE = 0x0092
-
-__sdcc_external_startup::
-; _mcs51_genXINIT() start
- mov r1,#l_XINIT
- mov a,r1
- orl a,#(l_XINIT >> 8)
- jz 00003$
- mov r2,#((l_XINIT+255) >> 8)
- mov dptr,#s_XINIT
- mov r0,#s_XISEG
- mov _MPAGE,#(s_XISEG >> 8)
-00001$: clr a
- movc a,@a+dptr
- movx @r0,a
- inc dptr
- inc r0
- cjne r0,#0,00002$
- inc _MPAGE
-00002$: djnz r1,00001$
- djnz r2,00001$
- mov _MPAGE,#0xFF
-00003$:
-
- ;; Danger! Total KLUDGE!
- ;; We pop the return address, add a magic number to it
- ;; then jump to that address. Believe it or not, this
- ;; looks like the least kludgy way to handle this,
- ;; short of patching the compiler...
-
- pop dph
- pop dpl
- mov a,#INSTRUCTION_BYTES_TO_SKIP
- jmp @a+dptr
diff --git a/firmware/fx2/src/common/blink_leds.c b/firmware/fx2/src/common/blink_leds.c
deleted file mode 100644
index 255c69733..000000000
--- a/firmware/fx2/src/common/blink_leds.c
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * USRP - Universal Software Radio Peripheral
- *
- * Copyright (C) 2003 Free Software Foundation, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA
- */
-
-#include "usrp_common.h"
-
-void
-main (void)
-{
- unsigned short counter = 0;
-
- init_usrp ();
-
- while (1){
- unsigned char counter_high = counter >> 8;
- set_led_0 (counter_high & 0x40);
- set_led_1 (counter_high & 0x80);
- counter++;
- }
-}
diff --git a/firmware/fx2/src/common/build_eeprom.py b/firmware/fx2/src/common/build_eeprom.py
deleted file mode 100755
index ae62587db..000000000
--- a/firmware/fx2/src/common/build_eeprom.py
+++ /dev/null
@@ -1,107 +0,0 @@
-#!/usr/bin/env python
-#
-# Copyright 2004,2006 Free Software Foundation, Inc.
-#
-# This file is part of GNU Radio
-#
-# GNU Radio is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 3, or (at your option)
-# any later version.
-#
-# GNU Radio is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with GNU Radio; see the file COPYING. If not, write to
-# the Free Software Foundation, Inc., 51 Franklin Street,
-# Boston, MA 02110-1301, USA.
-#
-
-import re
-import sys
-import os, os.path
-from optparse import OptionParser
-
-# USB Vendor and Product ID's
-
-VID = 0xfffe # Free Software Folks
-PID = 0x0002 # Universal Software Radio Peripheral
-
-def msb (x):
- return (x >> 8) & 0xff
-
-def lsb (x):
- return x & 0xff
-
-def build_eeprom_image (filename, rev):
- """Build a ``C2 Load'' EEPROM image.
-
- For details on this format, see section 3.4.3 of
- the EZ-USB FX2 Technical Reference Manual
- """
- # get the code we want to run
- f = open(filename, 'rb')
- bytes = f.read()
-
- devid = rev
- start_addr = 0 #prove me wrong
-
- rom_header = [
- 0xC2, # boot from EEPROM
- lsb (VID),
- msb (VID),
- lsb (PID),
- msb (PID),
- lsb (devid),
- msb (devid),
- 0 # configuration byte
- ]
-
- # 4 byte header that indicates where to load
- # the immediately follow code bytes.
- code_header = [
- msb (len (bytes)),
- lsb (len (bytes)),
- msb (start_addr),
- lsb (start_addr)
- ]
-
- # writes 0 to CPUCS reg (brings FX2 out of reset)
- trailer = [
- 0x80,
- 0x01,
- 0xe6,
- 0x00,
- 0x00
- ]
-
- image = rom_header + code_header + [ord(c) for c in bytes] + trailer
-
- assert (len (image) <= 256)
- return image
-
-if __name__ == '__main__':
- usage = "usage: %prog -r REV [options] bootfile.bin outfile.bin"
- parser = OptionParser (usage=usage)
- parser.add_option ("-r", "--rev", type="int", default=-1,
- help="Specify USRP revision number REV (2 or 4)")
- (options, args) = parser.parse_args ()
- if len (args) != 2:
- parser.print_help ()
- sys.exit (1)
- if options.rev < 0:
- sys.stderr.write (
- "You must specify the USRP revision number (2 or 4) with -r REV\n")
- sys.exit (1)
-
- infile = args[0]
- outfile = args[1]
-
- image = "".join(chr(c) for c in build_eeprom_image(infile, options.rev))
-
- f = open(outfile, 'wb')
- f.write(str(image))
- f.close()
diff --git a/firmware/fx2/src/common/check_mdelay.c b/firmware/fx2/src/common/check_mdelay.c
deleted file mode 100644
index de1af47f6..000000000
--- a/firmware/fx2/src/common/check_mdelay.c
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * USRP - Universal Software Radio Peripheral
- *
- * Copyright (C) 2003 Free Software Foundation, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA
- */
-
-#include "usrp_common.h"
-#include "delay.h"
-
-void
-main (void)
-{
- init_usrp ();
-
- // CPUCS = 0; // 12 MHz
- // CPUCS = bmCLKSPD0; // 24 MHz
- CPUCS = bmCLKSPD1; // 48 MHz
-
- while (1){
- USRP_LED_REG ^= bmLED0;
- mdelay (10);
- }
-}
diff --git a/firmware/fx2/src/common/check_udelay.c b/firmware/fx2/src/common/check_udelay.c
deleted file mode 100644
index 46885a067..000000000
--- a/firmware/fx2/src/common/check_udelay.c
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * USRP - Universal Software Radio Peripheral
- *
- * Copyright (C) 2003 Free Software Foundation, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA
- */
-
-#include "usrp_common.h"
-#include "delay.h"
-
-void
-main (void)
-{
- init_usrp ();
-
- // CPUCS = 0; // 12 MHz
- // CPUCS = bmCLKSPD0; // 24 MHz
- CPUCS = bmCLKSPD1; // 48 MHz
-
- while (1){
- USRP_LED_REG ^= bmLED0;
- udelay (250);
- }
-}
diff --git a/firmware/fx2/src/common/edit-gpif b/firmware/fx2/src/common/edit-gpif
deleted file mode 100755
index 5367b75a5..000000000
--- a/firmware/fx2/src/common/edit-gpif
+++ /dev/null
@@ -1,114 +0,0 @@
-#!/usr/bin/env python
-# -*- Python -*-
-#
-# Copyright 2003 Free Software Foundation, Inc.
-#
-# This file is part of GNU Radio
-#
-# GNU Radio is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 3, or (at your option)
-# any later version.
-#
-# GNU Radio is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with GNU Radio; see the file COPYING. If not, write to
-# the Free Software Foundation, Inc., 51 Franklin Street,
-# Boston, MA 02110-1301, USA.
-#
-
-
-# Edit the gpif.c file generated by the Cypress GPIF Designer Tool and
-# produce usrp_gpif.c, and usrp_gpif_inline.h, files suitable for our
-# uses.
-
-import re
-import string
-import sys
-
-def check_flow_state (line, flow_state_dict):
- mo = re.match (r'/\* Wave (\d) FlowStates \*/ (.*),', line)
- if mo:
- wave = int (mo.group (1))
- data = mo.group (2)
- split = data.split (',', 8)
- v = map (lambda x : int (x, 16), split)
- # print "%s, %s" % (wave, data)
- # print "split: ", split
- # print "v : ", v
- flow_state_dict[wave] = v
-
-
-def delta (xseq, yseq):
- # set subtraction
- z = []
- for x in xseq:
- if x not in yseq:
- z.append (x)
- return z
-
-
-def write_define (output, name, pairs):
- output.write ('#define %s()\t\\\n' % name)
- output.write ('do {\t\t\t\t\t\\\n')
- for reg, val in pairs:
- output.write ('%14s = 0x%02x;\t\t\t\\\n' % (reg, val))
- output.write ('} while (0)\n\n')
-
-def write_inlines (output, dict):
- regs = ['FLOWSTATE', 'FLOWLOGIC', 'FLOWEQ0CTL', 'FLOWEQ1CTL', 'FLOWHOLDOFF',
- 'FLOWSTB', 'FLOWSTBEDGE', 'FLOWSTBHPERIOD', 'GPIFHOLDAMOUNT']
-
- READ_FLOW_STATE = 2
- WRITE_FLOW_STATE = 3
-
- read_info = zip (regs, dict[READ_FLOW_STATE])
- write_info = zip (regs, dict[WRITE_FLOW_STATE])
-
- output.write ('''/*
- * Machine generated by "edit-gpif". Do not edit by hand.
- */
-
-''')
- write_define (output, 'setup_flowstate_common', read_info)
- write_define (output, 'setup_flowstate_read', delta (read_info, write_info))
- write_define (output, 'setup_flowstate_write', delta (write_info, read_info))
-
-
-def edit_gpif (input_name, output_name, inline_name):
- input = open (input_name, 'r')
- output = open (output_name, 'w')
- inline = open (inline_name, 'w')
- flow_state_dict = {}
-
- output.write ('''/*
- * Machine generated by "edit-gpif". Do not edit by hand.
- */
-
-''')
-
- while 1:
- line = input.readline ()
- line = string.replace (line, '\r','')
- line = re.sub (r' *$', r'', line)
-
- check_flow_state (line, flow_state_dict)
-
- line = re.sub (r'#include', r'// #include', line)
- line = re.sub (r'xdata ', r'', line)
- if re.search (r'GpifInit', line):
- break
-
- output.write (line)
-
- output.close ()
- write_inlines (inline, flow_state_dict)
- inline.close ()
-
-
-# gpif.c usrp_gpif.c usrp_gpif_inline.h
-edit_gpif (sys.argv[1], sys.argv[2], sys.argv[3])
diff --git a/firmware/fx2/src/common/fpga.h b/firmware/fx2/src/common/fpga.h
deleted file mode 100644
index 6cd5de8e2..000000000
--- a/firmware/fx2/src/common/fpga.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/* -*- c++ -*- */
-/*
- * Copyright 2004 Free Software Foundation, Inc.
- *
- * This file is part of GNU Radio
- *
- * GNU Radio is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 3, or (at your option)
- * any later version.
- *
- * GNU Radio is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with GNU Radio; see the file COPYING. If not, write to
- * the Free Software Foundation, Inc., 51 Franklin Street,
- * Boston, MA 02110-1301, USA.
- */
-#ifndef INCLUDED_FPGA_H
-#define INCLUDED_FPGA_H
-
-#include "fpga_load.h"
-
-#if defined(HAVE_USRP2)
-#include "fpga_rev2.h"
-#endif
-
-#endif /* INCLUDED_FPGA_H */
diff --git a/firmware/fx2/src/common/fpga_load.c b/firmware/fx2/src/common/fpga_load.c
deleted file mode 100644
index c3ae9e707..000000000
--- a/firmware/fx2/src/common/fpga_load.c
+++ /dev/null
@@ -1,193 +0,0 @@
-/*
- * USRP - Universal Software Radio Peripheral
- *
- * Copyright (C) 2003 Free Software Foundation, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA
- */
-
-#include "usrp_common.h"
-#include "fpga_load.h"
-#include "delay.h"
-
-/*
- * setup altera FPGA serial load (PS).
- *
- * On entry:
- * don't care
- *
- * On exit:
- * ALTERA_DCLK = 0
- * ALTERA_NCONFIG = 1
- * ALTERA_NSTATUS = 1 (input)
- */
-unsigned char
-fpga_load_begin (void)
-{
- USRP_ALTERA_CONFIG &= ~bmALTERA_BITS; // clear all bits (NCONFIG low)
- udelay (40); // wait 40 us
- USRP_ALTERA_CONFIG |= bmALTERA_NCONFIG; // set NCONFIG high
-
- if (UC_BOARD_HAS_FPGA){
- // FIXME should really cap this loop with a counter so we
- // don't hang forever on a hardware failure.
- while ((USRP_ALTERA_CONFIG & bmALTERA_NSTATUS) == 0) // wait for NSTATUS to go high
- ;
- }
-
- // ready to xfer now
-
- return 1;
-}
-
-/*
- * clock out the low bit of bits.
- *
- * On entry:
- * ALTERA_DCLK = 0
- * ALTERA_NCONFIG = 1
- * ALTERA_NSTATUS = 1 (input)
- *
- * On exit:
- * ALTERA_DCLK = 0
- * ALTERA_NCONFIG = 1
- * ALTERA_NSTATUS = 1 (input)
- */
-
-
-#if 0
-
-static void
-clock_out_config_byte (unsigned char bits)
-{
- unsigned char i;
-
- // clock out configuration byte, least significant bit first
-
- for (i = 0; i < 8; i++){
-
- USRP_ALTERA_CONFIG = ((USRP_ALTERA_CONFIG & ~bmALTERA_DATA0) | ((bits & 1) ? bmALTERA_DATA0 : 0));
- USRP_ALTERA_CONFIG |= bmALTERA_DCLK; /* set DCLK to 1 */
- USRP_ALTERA_CONFIG &= ~bmALTERA_DCLK; /* set DCLK to 0 */
-
- bits = bits >> 1;
- }
-}
-
-#else
-
-static void
-clock_out_config_byte (unsigned char bits) _naked
-{
- _asm
- mov a, dpl
-
- rrc a
- mov _bitALTERA_DATA0,c
- setb _bitALTERA_DCLK
- clr _bitALTERA_DCLK
-
- rrc a
- mov _bitALTERA_DATA0,c
- setb _bitALTERA_DCLK
- clr _bitALTERA_DCLK
-
- rrc a
- mov _bitALTERA_DATA0,c
- setb _bitALTERA_DCLK
- clr _bitALTERA_DCLK
-
- rrc a
- mov _bitALTERA_DATA0,c
- setb _bitALTERA_DCLK
- clr _bitALTERA_DCLK
-
- rrc a
- mov _bitALTERA_DATA0,c
- setb _bitALTERA_DCLK
- clr _bitALTERA_DCLK
-
- rrc a
- mov _bitALTERA_DATA0,c
- setb _bitALTERA_DCLK
- clr _bitALTERA_DCLK
-
- rrc a
- mov _bitALTERA_DATA0,c
- setb _bitALTERA_DCLK
- clr _bitALTERA_DCLK
-
- rrc a
- mov _bitALTERA_DATA0,c
- setb _bitALTERA_DCLK
- clr _bitALTERA_DCLK
-
- ret
-
- _endasm;
-}
-
-#endif
-
-static void
-clock_out_bytes (unsigned char bytecount,
- unsigned char xdata *p)
-{
- while (bytecount-- > 0)
- clock_out_config_byte (*p++);
-}
-
-/*
- * Transfer block of bytes from packet to FPGA serial configuration port
- *
- * On entry:
- * ALTERA_DCLK = 0
- * ALTERA_NCONFIG = 1
- * ALTERA_NSTATUS = 1 (input)
- *
- * On exit:
- * ALTERA_DCLK = 0
- * ALTERA_NCONFIG = 1
- * ALTERA_NSTATUS = 1 (input)
- */
-unsigned char
-fpga_load_xfer (xdata unsigned char *p, unsigned char bytecount)
-{
- clock_out_bytes (bytecount, p);
- return 1;
-}
-
-/*
- * check for successful load...
- */
-unsigned char
-fpga_load_end (void)
-{
- unsigned char status = USRP_ALTERA_CONFIG;
-
- if (!UC_BOARD_HAS_FPGA) // always true if we don't have FPGA
- return 1;
-
- if ((status & bmALTERA_NSTATUS) == 0) // failed to program
- return 0;
-
- if ((status & bmALTERA_CONF_DONE) == bmALTERA_CONF_DONE)
- return 1; // everything's cool
-
- // I don't think this should happen. It indicates that
- // programming is still in progress.
-
- return 0;
-}
diff --git a/firmware/fx2/src/common/fpga_load.h b/firmware/fx2/src/common/fpga_load.h
deleted file mode 100644
index 7c36a04c8..000000000
--- a/firmware/fx2/src/common/fpga_load.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * USRP - Universal Software Radio Peripheral
- *
- * Copyright (C) 2003 Free Software Foundation, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA
- */
-
-#ifndef INCLUDED_FPGA_LOAD_H
-#define INCLUDED_FPGA_LOAD_H
-
-unsigned char fpga_load_begin (void);
-unsigned char fpga_load_xfer (xdata unsigned char *p, unsigned char len);
-unsigned char fpga_load_end (void);
-
-#endif /* INCLUDED_FPGA_LOAD_H */
diff --git a/firmware/fx2/src/common/gpif.c b/firmware/fx2/src/common/gpif.c
deleted file mode 100755
index 489e6e81a..000000000
--- a/firmware/fx2/src/common/gpif.c
+++ /dev/null
@@ -1,292 +0,0 @@
-// This program configures the General Programmable Interface (GPIF) for FX2.
-// Please do not modify sections of text which are marked as "DO NOT EDIT ...".
-//
-// DO NOT EDIT ...
-// GPIF Initialization
-// Interface Timing Async
-// Internal Ready Init IntRdy=1
-// CTL Out Tristate-able Binary
-// SingleWrite WF Select 1
-// SingleRead WF Select 0
-// FifoWrite WF Select 3
-// FifoRead WF Select 2
-// Data Bus Idle Drive Tristate
-// END DO NOT EDIT
-
-// DO NOT EDIT ...
-// GPIF Wave Names
-// Wave 0 = singlerd
-// Wave 1 = singlewr
-// Wave 2 = FIFORd
-// Wave 3 = FIFOWr
-
-// GPIF Ctrl Outputs Level
-// CTL 0 = WEN# CMOS
-// CTL 1 = REN# CMOS
-// CTL 2 = OE# CMOS
-// CTL 3 = CLRST CMOS
-// CTL 4 = unused CMOS
-// CTL 5 = BOGUS CMOS
-
-// GPIF Rdy Inputs
-// RDY0 = EF#
-// RDY1 = FF#
-// RDY2 = unused
-// RDY3 = unused
-// RDY4 = unused
-// RDY5 = TCXpire
-// FIFOFlag = FIFOFlag
-// IntReady = IntReady
-// END DO NOT EDIT
-// DO NOT EDIT ...
-//
-// GPIF Waveform 0: singlerd
-//
-// Interval 0 1 2 3 4 5 6 Idle (7)
-// _________ _________ _________ _________ _________ _________ _________ _________
-//
-// AddrMode Same Val Same Val Same Val Same Val Same Val Same Val Same Val
-// DataMode NO Data NO Data NO Data NO Data NO Data NO Data NO Data
-// NextData SameData SameData SameData SameData SameData SameData SameData
-// Int Trig No Int No Int No Int No Int No Int No Int No Int
-// IF/Wait Wait 1 Wait 1 Wait 1 Wait 1 Wait 1 Wait 1 Wait 1
-// Term A
-// LFunc
-// Term B
-// Branch1
-// Branch0
-// Re-Exec
-// Sngl/CRC Default Default Default Default Default Default Default
-// WEN# 0 0 0 0 0 0 0 0
-// REN# 0 0 0 0 0 0 0 0
-// OE# 0 0 0 0 0 0 0 0
-// CLRST 0 0 0 0 0 0 0 0
-// unused 0 0 0 0 0 0 0 0
-// BOGUS 0 0 0 0 0 0 0 0
-//
-// END DO NOT EDIT
-// DO NOT EDIT ...
-//
-// GPIF Waveform 1: singlewr
-//
-// Interval 0 1 2 3 4 5 6 Idle (7)
-// _________ _________ _________ _________ _________ _________ _________ _________
-//
-// AddrMode Same Val Same Val Same Val Same Val Same Val Same Val Same Val
-// DataMode Activate Activate Activate Activate Activate Activate Activate
-// NextData SameData SameData SameData SameData SameData SameData SameData
-// Int Trig No Int No Int No Int No Int No Int No Int No Int
-// IF/Wait Wait 1 IF Wait 1 Wait 1 Wait 1 Wait 1 Wait 1
-// Term A EF#
-// LFunc AND
-// Term B EF#
-// Branch1 ThenIdle
-// Branch0 ElseIdle
-// Re-Exec No
-// Sngl/CRC Default Default Default Default Default Default Default
-// WEN# 0 1 1 1 1 1 1 0
-// REN# 0 0 0 0 0 0 0 0
-// OE# 0 0 0 0 0 0 0 0
-// CLRST 0 0 0 0 0 0 0 0
-// unused 0 0 0 0 0 0 0 0
-// BOGUS 0 0 0 0 0 0 0 0
-//
-// END DO NOT EDIT
-// DO NOT EDIT ...
-//
-// GPIF Waveform 2: FIFORd
-//
-// Interval 0 1 2 3 4 5 6 Idle (7)
-// _________ _________ _________ _________ _________ _________ _________ _________
-//
-// AddrMode Same Val Same Val Same Val Same Val Same Val Same Val Same Val
-// DataMode NO Data Activate NO Data NO Data NO Data NO Data NO Data
-// NextData SameData SameData SameData SameData SameData SameData SameData
-// Int Trig No Int No Int No Int No Int No Int No Int No Int
-// IF/Wait Wait 1 IF Wait 1 IF Wait 1 Wait 1 Wait 1
-// Term A TCXpire TCXpire
-// LFunc AND AND
-// Term B TCXpire TCXpire
-// Branch1 Then 2 ThenIdle
-// Branch0 Else 1 ElseIdle
-// Re-Exec No No
-// Sngl/CRC Default Default Default Default Default Default Default
-// WEN# 0 0 0 0 0 0 0 0
-// REN# 0 0 0 0 0 0 0 0
-// OE# 1 1 1 0 0 0 0 0
-// CLRST 0 0 0 0 0 0 0 0
-// unused 0 0 0 0 0 0 0 0
-// BOGUS 0 0 0 0 0 0 0 0
-//
-// END DO NOT EDIT
-// DO NOT EDIT ...
-//
-// GPIF Waveform 3: FIFOWr
-//
-// Interval 0 1 2 3 4 5 6 Idle (7)
-// _________ _________ _________ _________ _________ _________ _________ _________
-//
-// AddrMode Same Val Same Val Same Val Same Val Same Val Same Val Same Val
-// DataMode NO Data Activate Activate Activate Activate Activate Activate
-// NextData SameData SameData SameData SameData SameData SameData SameData
-// Int Trig No Int No Int No Int No Int No Int No Int No Int
-// IF/Wait Wait 1 IF Wait 1 Wait 1 Wait 1 Wait 1 Wait 1
-// Term A TCXpire
-// LFunc AND
-// Term B TCXpire
-// Branch1 ThenIdle
-// Branch0 Else 1
-// Re-Exec No
-// Sngl/CRC Default Default Default Default Default Default Default
-// WEN# 0 0 0 0 0 0 0 0
-// REN# 0 0 0 0 0 0 0 0
-// OE# 0 0 0 0 0 0 0 0
-// CLRST 0 0 0 0 0 0 0 0
-// unused 0 0 0 0 0 0 0 0
-// BOGUS 0 0 0 0 0 0 0 0
-//
-// END DO NOT EDIT
-
-// GPIF Program Code
-
-// DO NOT EDIT ...
-#include "fx2.h"
-#include "fx2regs.h"
-#include "fx2sdly.h" // SYNCDELAY macro
-// END DO NOT EDIT
-
-// DO NOT EDIT ...
-const char xdata WaveData[128] =
-{
-// Wave 0
-/* LenBr */ 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x07,
-/* Opcode*/ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-/* Output*/ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-/* LFun */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F,
-// Wave 1
-/* LenBr */ 0x01, 0x3F, 0x01, 0x01, 0x01, 0x01, 0x01, 0x07,
-/* Opcode*/ 0x22, 0x03, 0x02, 0x02, 0x02, 0x02, 0x02, 0x00,
-/* Output*/ 0x00, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x00,
-/* LFun */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F,
-// Wave 2
-/* LenBr */ 0x01, 0x11, 0x01, 0x3F, 0x01, 0x01, 0x01, 0x07,
-/* Opcode*/ 0x00, 0x03, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00,
-/* Output*/ 0x04, 0x04, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00,
-/* LFun */ 0x00, 0x2D, 0x00, 0x2D, 0x00, 0x00, 0x00, 0x3F,
-// Wave 3
-/* LenBr */ 0x01, 0x39, 0x01, 0x01, 0x01, 0x01, 0x01, 0x07,
-/* Opcode*/ 0x00, 0x03, 0x02, 0x02, 0x02, 0x02, 0x02, 0x00,
-/* Output*/ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-/* LFun */ 0x00, 0x2D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F,
-};
-// END DO NOT EDIT
-
-// DO NOT EDIT ...
-const char xdata FlowStates[36] =
-{
-/* Wave 0 FlowStates */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* Wave 1 FlowStates */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* Wave 2 FlowStates */ 0x81,0x2D,0x26,0x00,0x04,0x04,0x03,0x02,0x00,
-/* Wave 3 FlowStates */ 0x81,0x2D,0x21,0x00,0x04,0x04,0x03,0x02,0x00,
-};
-// END DO NOT EDIT
-
-// DO NOT EDIT ...
-const char xdata InitData[7] =
-{
-/* Regs */ 0xA0,0x00,0x00,0x00,0xEE,0x4E,0x00
-};
-// END DO NOT EDIT
-
-// TO DO: You may add additional code below.
-
-void GpifInit( void )
-{
- BYTE i;
-
- // Registers which require a synchronization delay, see section 15.14
- // FIFORESET FIFOPINPOLAR
- // INPKTEND OUTPKTEND
- // EPxBCH:L REVCTL
- // GPIFTCB3 GPIFTCB2
- // GPIFTCB1 GPIFTCB0
- // EPxFIFOPFH:L EPxAUTOINLENH:L
- // EPxFIFOCFG EPxGPIFFLGSEL
- // PINFLAGSxx EPxFIFOIRQ
- // EPxFIFOIE GPIFIRQ
- // GPIFIE GPIFADRH:L
- // UDMACRCH:L EPxGPIFTRIG
- // GPIFTRIG
-
- // Note: The pre-REVE EPxGPIFTCH/L register are affected, as well...
- // ...these have been replaced by GPIFTC[B3:B0] registers
-
- // 8051 doesn't have access to waveform memories 'til
- // the part is in GPIF mode.
-
- IFCONFIG = 0xEE;
- // IFCLKSRC=1 , FIFOs executes on internal clk source
- // xMHz=1 , 48MHz internal clk rate
- // IFCLKOE=0 , Don't drive IFCLK pin signal at 48MHz
- // IFCLKPOL=0 , Don't invert IFCLK pin signal from internal clk
- // ASYNC=1 , master samples asynchronous
- // GSTATE=1 , Drive GPIF states out on PORTE[2:0], debug WF
- // IFCFG[1:0]=10, FX2 in GPIF master mode
-
- GPIFABORT = 0xFF; // abort any waveforms pending
-
- GPIFREADYCFG = InitData[ 0 ];
- GPIFCTLCFG = InitData[ 1 ];
- GPIFIDLECS = InitData[ 2 ];
- GPIFIDLECTL = InitData[ 3 ];
- GPIFWFSELECT = InitData[ 5 ];
- GPIFREADYSTAT = InitData[ 6 ];
-
- // use dual autopointer feature...
- AUTOPTRSETUP = 0x07; // inc both pointers,
- // ...warning: this introduces pdata hole(s)
- // ...at E67B (XAUTODAT1) and E67C (XAUTODAT2)
-
- // source
- AUTOPTRH1 = MSB( &WaveData );
- AUTOPTRL1 = LSB( &WaveData );
-
- // destination
- AUTOPTRH2 = 0xE4;
- AUTOPTRL2 = 0x00;
-
- // transfer
- for ( i = 0x00; i < 128; i++ )
- {
- EXTAUTODAT2 = EXTAUTODAT1;
- }
-
-// Configure GPIF Address pins, output initial value,
- PORTCCFG = 0xFF; // [7:0] as alt. func. GPIFADR[7:0]
- OEC = 0xFF; // and as outputs
- PORTECFG |= 0x80; // [8] as alt. func. GPIFADR[8]
- OEE |= 0x80; // and as output
-
-// ...OR... tri-state GPIFADR[8:0] pins
-// PORTCCFG = 0x00; // [7:0] as port I/O
-// OEC = 0x00; // and as inputs
-// PORTECFG &= 0x7F; // [8] as port I/O
-// OEE &= 0x7F; // and as input
-
-// GPIF address pins update when GPIFADRH/L written
- SYNCDELAY; //
- GPIFADRH = 0x00; // bits[7:1] always 0
- SYNCDELAY; //
- GPIFADRL = 0x00; // point to PERIPHERAL address 0x0000
-
-// Configure GPIF FlowStates registers for Wave 0 of WaveData
- FLOWSTATE = FlowStates[ 0 ];
- FLOWLOGIC = FlowStates[ 1 ];
- FLOWEQ0CTL = FlowStates[ 2 ];
- FLOWEQ1CTL = FlowStates[ 3 ];
- FLOWHOLDOFF = FlowStates[ 4 ];
- FLOWSTB = FlowStates[ 5 ];
- FLOWSTBEDGE = FlowStates[ 6 ];
- FLOWSTBHPERIOD = FlowStates[ 7 ];
-}
-
diff --git a/firmware/fx2/src/common/gpif.gpf b/firmware/fx2/src/common/gpif.gpf
deleted file mode 100755
index a954ac193..000000000
--- a/firmware/fx2/src/common/gpif.gpf
+++ /dev/null
Binary files differ
diff --git a/firmware/fx2/src/common/init_gpif.c b/firmware/fx2/src/common/init_gpif.c
deleted file mode 100644
index edde919be..000000000
--- a/firmware/fx2/src/common/init_gpif.c
+++ /dev/null
@@ -1,59 +0,0 @@
-/*
- * USRP - Universal Software Radio Peripheral
- *
- * Copyright (C) 2003 Free Software Foundation, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA
- */
-
-#include "usrp_common.h"
-
-// These are the tables generated by the Cypress GPIF Designer
-
-extern const char WaveData[128];
-extern const char FlowStates[36];
-extern const char InitData[7];
-
-// The tool is kind of screwed up, in that it doesn't configure some
-// of the ports correctly. We just use their tables and handle the
-// initialization ourselves. They also declare that their static
-// initialized data is in xdata, which screws us too.
-
-void
-init_gpif (void)
-{
- // we've already setup IFCONFIG before calling this...
-
- GPIFABORT = 0xFF; // abort any waveforms pending
- SYNCDELAY;
-
- GPIFREADYCFG = InitData[ 0 ];
- GPIFCTLCFG = InitData[ 1 ];
- GPIFIDLECS = InitData[ 2 ];
- GPIFIDLECTL = InitData[ 3 ];
- // Hmmm, what's InitData[ 4 ] ...
- GPIFWFSELECT = InitData[ 5 ];
- // GPIFREADYSTAT = InitData[ 6 ]; // I think this register is read only...
-
- {
- BYTE i;
-
- for (i = 0; i < 128; i++){
- GPIF_WAVE_DATA[i] = WaveData[i];
- }
- }
-
- FLOWSTATE = 0; /* ensure it's off */
-}
diff --git a/firmware/fx2/src/common/usrp_common.c b/firmware/fx2/src/common/usrp_common.c
deleted file mode 100644
index 0998653c2..000000000
--- a/firmware/fx2/src/common/usrp_common.c
+++ /dev/null
@@ -1,109 +0,0 @@
-/*
- * USRP - Universal Software Radio Peripheral
- *
- * Copyright (C) 2003 Free Software Foundation, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA
- */
-
-/*
- * common code for USRP
- */
-
-#include "usrp_common.h"
-
-void init_board (void);
-
-void
-init_usrp (void)
-{
- CPUCS = bmCLKSPD1; // CPU runs @ 48 MHz
- CKCON = 0; // MOVX takes 2 cycles
-
- // IFCLK is generated internally and runs at 48 MHz; GPIF "master mode"
-
- IFCONFIG = bmIFCLKSRC | bm3048MHZ | bmIFCLKOE | bmIFCLKPOL | bmIFGPIF;
- SYNCDELAY;
-
- // configure IO ports (B and D are used by GPIF)
-
- IOA = bmPORT_A_INITIAL; // Port A initial state
- OEA = bmPORT_A_OUTPUTS; // Port A direction register
-
- IOC = bmPORT_C_INITIAL; // Port C initial state
- OEC = bmPORT_C_OUTPUTS; // Port C direction register
-
- IOE = bmPORT_E_INITIAL; // Port E initial state
- OEE = bmPORT_E_OUTPUTS; // Port E direction register
-
-
- // REVCTL = bmDYN_OUT | bmENH_PKT; // highly recommended by docs
- // SYNCDELAY;
-
- // configure end points
-
- EP1OUTCFG = bmVALID | bmBULK; SYNCDELAY;
- EP1INCFG = bmVALID | bmBULK | bmIN; SYNCDELAY;
-
- EP2CFG = bmVALID | bmBULK | bmQUADBUF; SYNCDELAY; // 512 quad bulk OUT
- EP4CFG = 0; SYNCDELAY; // disabled
- EP6CFG = bmVALID | bmBULK | bmQUADBUF | bmIN; SYNCDELAY; // 512 quad bulk IN
- EP8CFG = 0; SYNCDELAY; // disabled
-
- // reset FIFOs
-
- FIFORESET = bmNAKALL; SYNCDELAY;
- FIFORESET = 2; SYNCDELAY;
- // FIFORESET = 4; SYNCDELAY;
- FIFORESET = 6; SYNCDELAY;
- // FIFORESET = 8; SYNCDELAY;
- FIFORESET = 0; SYNCDELAY;
-
- // configure end point FIFOs
-
- // let core see 0 to 1 transistion of autoout bit
-
- EP2FIFOCFG = bmWORDWIDE; SYNCDELAY;
- EP2FIFOCFG = bmAUTOOUT | bmWORDWIDE; SYNCDELAY;
- EP6FIFOCFG = bmAUTOIN | bmWORDWIDE; SYNCDELAY;
-
-
- // prime the pump
-
-#if 0
- EP2BCL = 0x80; SYNCDELAY;
- EP2BCL = 0x80; SYNCDELAY;
- EP2BCL = 0x80; SYNCDELAY;
- EP2BCL = 0x80; SYNCDELAY;
-#endif
-
- EP0BCH = 0; SYNCDELAY;
-
- // arm EP1OUT so we can receive "out" packets (TRM pg 8-8)
-
- EP1OUTBC = 0; SYNCDELAY;
-
- EP2GPIFFLGSEL = 0x01; SYNCDELAY; // For EP2OUT, GPIF uses EF flag
- EP6GPIFFLGSEL = 0x02; SYNCDELAY; // For EP6IN, GPIF uses FF flag
-
- // set autoin length for EP6
- // FIXME should be f(enumeration)
-
- EP6AUTOINLENH = (512) >> 8; SYNCDELAY; // this is the length for high speed
- EP6AUTOINLENL = (512) & 0xff; SYNCDELAY;
-
- init_board ();
-}
-
diff --git a/firmware/fx2/src/common/usrp_globals.h b/firmware/fx2/src/common/usrp_globals.h
deleted file mode 100644
index 445e9e6b4..000000000
--- a/firmware/fx2/src/common/usrp_globals.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/* -*- c++ -*- */
-/*
- * Copyright 2003 Free Software Foundation, Inc.
- *
- * This file is part of GNU Radio
- *
- * GNU Radio is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 3, or (at your option)
- * any later version.
- *
- * GNU Radio is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with GNU Radio; see the file COPYING. If not, write to
- * the Free Software Foundation, Inc., 51 Franklin Street,
- * Boston, MA 02110-1301, USA.
- */
-#ifndef _USRP_GLOBALS_H_
-#define _USRP_GLOBALS_H_
-
-extern unsigned char g_tx_enable;
-extern unsigned char g_rx_enable;
-extern unsigned char g_fpga_reset;
-extern unsigned char g_rx_overrun;
-extern unsigned char g_tx_underrun;
-
-
-#endif /* _USRP_GLOBALS_H_ */
diff --git a/firmware/fx2/src/common/vectors.a51 b/firmware/fx2/src/common/vectors.a51
deleted file mode 100644
index e9382ab84..000000000
--- a/firmware/fx2/src/common/vectors.a51
+++ /dev/null
@@ -1,180 +0,0 @@
-;;; -*- asm -*-
-;;;
-;;; Copyright 2003 Free Software Foundation, Inc.
-;;;
-;;; This file is part of GNU Radio
-;;;
-;;; GNU Radio is free software; you can redistribute it and/or modify
-;;; it under the terms of the GNU General Public License as published by
-;;; the Free Software Foundation; either version 3, or (at your option)
-;;; any later version.
-;;;
-;;; GNU Radio is distributed in the hope that it will be useful,
-;;; but WITHOUT ANY WARRANTY; without even the implied warranty of
-;;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-;;; GNU General Public License for more details.
-;;;
-;;; You should have received a copy of the GNU General Public License
-;;; along with GNU Radio; see the file COPYING. If not, write to
-;;; the Free Software Foundation, Inc., 51 Franklin Street,
-;;; Boston, MA 02110-1301, USA.
-;;;
-
-;;; Interrupt vectors.
-
-;;; N.B. This object module must come first in the list of modules
-
- .module vectors
-
-;;; ----------------------------------------------------------------
-;;; standard FX2 interrupt vectors
-;;; ----------------------------------------------------------------
-
- .area CSEG (CODE)
- .area GSINIT (CODE)
- .area CSEG (CODE)
-__standard_interrupt_vector::
-__reset_vector::
- ljmp s_GSINIT
-
- ;; 13 8-byte entries. We point them all at __isr_nop
- ljmp __isr_nop ; 3 bytes
- .ds 5 ; + 5 = 8 bytes for vector slot
- ljmp __isr_nop
- .ds 5
- ljmp __isr_nop
- .ds 5
- ljmp __isr_nop
- .ds 5
- ljmp __isr_nop
- .ds 5
- ljmp __isr_nop
- .ds 5
- ljmp __isr_nop
- .ds 5
- ljmp __isr_nop
- .ds 5
- ljmp __isr_nop
- .ds 5
- ljmp __isr_nop
- .ds 5
- ljmp __isr_nop
- .ds 5
- ljmp __isr_nop
- .ds 5
- ljmp __isr_nop
- .ds 5
-
-__isr_nop::
- reti
-
-;;; ----------------------------------------------------------------
-;;; the FIFO/GPIF autovector. 14 4-byte entries.
-;;; must start on a 128 byte boundary.
-;;; ----------------------------------------------------------------
-
- . = __reset_vector + 0x0080
-
-__fifo_gpif_autovector::
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
-
-
-;;; ----------------------------------------------------------------
-;;; the USB autovector. 32 4-byte entries.
-;;; must start on a 256 byte boundary.
-;;; ----------------------------------------------------------------
-
- . = __reset_vector + 0x0100
-
-__usb_autovector::
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop
- ljmp __isr_nop
- nop