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| author | Marcus Müller <marcus.mueller@ettus.com> | 2017-01-16 15:54:57 +0100 |
|---|---|---|
| committer | Martin Braun <martin.braun@ettus.com> | 2017-06-29 15:53:15 -0700 |
| commit | d9bcf00f69313b6dd42346d6af340a1a9874ba9f (patch) | |
| tree | 62185d7ea2c20952d60cf8f6a558866ecf1d54bf /firmware/fx2/b100/usrp_regs.h | |
| parent | c77bd0c46a598d5e69b179d76a3df6091e982129 (diff) | |
| download | uhd-d9bcf00f69313b6dd42346d6af340a1a9874ba9f.tar.gz uhd-d9bcf00f69313b6dd42346d6af340a1a9874ba9f.tar.bz2 uhd-d9bcf00f69313b6dd42346d6af340a1a9874ba9f.zip | |
made FX2 EEPROMS and firmware build with modern SDCC 3.6
Diffstat (limited to 'firmware/fx2/b100/usrp_regs.h')
| -rw-r--r-- | firmware/fx2/b100/usrp_regs.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/firmware/fx2/b100/usrp_regs.h b/firmware/fx2/b100/usrp_regs.h index 3d65337f5..6456f09c8 100644 --- a/firmware/fx2/b100/usrp_regs.h +++ b/firmware/fx2/b100/usrp_regs.h @@ -59,11 +59,11 @@ #define PORT_A_ADDR 0x80 #define PORT_C_ADDR 0xA0 -sbit at PORT_A_ADDR+0 bitALTERA_DCLK; // 0x80 is the bit address of PORT A -sbit at PORT_A_ADDR+1 bitALTERA_NCONFIG; -sbit at PORT_A_ADDR+3 bitALTERA_DATA0; +__sbit __at (PORT_A_ADDR+0) bitALTERA_DCLK; // 0x80 is the bit address of PORT A +__sbit __at (PORT_A_ADDR+1) bitALTERA_NCONFIG; +__sbit __at (PORT_A_ADDR+3) bitALTERA_DATA0; -sbit at PORT_C_ADDR+7 bitALTERA_CONF_DONE; +__sbit __at (PORT_C_ADDR+7) bitALTERA_CONF_DONE; /* Port B: GPIF FD[7:0] */ |