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authorNick Foster <nick@ettus.com>2011-10-10 10:20:41 -0700
committerJosh Blum <josh@joshknows.com>2011-10-10 15:47:28 -0700
commit7d08d1b5874459313a8274b9a8805e126eeb5a6e (patch)
treedaef130d229524cccf0dfdcf1db704bc74cb5b1c /firmware/fx2/b100/usrp_regs.h
parent819dbc789e4cb63624eefb7ffb662bee33d08e19 (diff)
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B100 firmware fix for FPGA load race condition, plus a little cleanup for readability
Diffstat (limited to 'firmware/fx2/b100/usrp_regs.h')
-rw-r--r--firmware/fx2/b100/usrp_regs.h15
1 files changed, 10 insertions, 5 deletions
diff --git a/firmware/fx2/b100/usrp_regs.h b/firmware/fx2/b100/usrp_regs.h
index 775b5dfd3..493a0c3de 100644
--- a/firmware/fx2/b100/usrp_regs.h
+++ b/firmware/fx2/b100/usrp_regs.h
@@ -41,7 +41,6 @@
#define bmALTERA_NCONFIG bmBIT1
#define bmALTERA_DATA0 bmBIT3
#define bmALTERA_NSTATUS bmBIT4
-#define bmALTERA_CONF_DONE bmBIT5
#define bmRESET_FPGA_FIFOS bmBIT7
@@ -49,7 +48,6 @@
| bmALTERA_NCONFIG \
| bmALTERA_DATA0 \
| bmALTERA_NSTATUS \
- | bmALTERA_CONF_DONE \
)
@@ -60,9 +58,16 @@
#define bmPORT_A_INITIAL 0
-sbit at 0x80+0 bitALTERA_DCLK; // 0x80 is the bit address of PORT A
-sbit at 0x80+2 bitSHORT_PACKET_SIGNAL;
-sbit at 0x80+3 bitALTERA_DATA0;
+#define PORT_A_ADDR 0x80
+#define PORT_C_ADDR 0xA0
+
+sbit at PORT_A_ADDR+0 bitALTERA_DCLK; // 0x80 is the bit address of PORT A
+sbit at PORT_A_ADDR+1 bitALTERA_NCONFIG;
+sbit at PORT_A_ADDR+2 bitSHORT_PACKET_SIGNAL;
+sbit at PORT_A_ADDR+3 bitALTERA_DATA0;
+sbit at PORT_A_ADDR+4 bitALTERA_NSTATUS;
+
+sbit at PORT_C_ADDR+7 bitALTERA_CONF_DONE;
/* Port B: GPIF FD[7:0] */