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authorNick Foster <nick@ettus.com>2011-10-10 10:20:41 -0700
committerJosh Blum <josh@joshknows.com>2011-10-10 15:47:28 -0700
commit7d08d1b5874459313a8274b9a8805e126eeb5a6e (patch)
treedaef130d229524cccf0dfdcf1db704bc74cb5b1c /firmware/fx2/b100/fpga_load.c
parent819dbc789e4cb63624eefb7ffb662bee33d08e19 (diff)
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B100 firmware fix for FPGA load race condition, plus a little cleanup for readability
Diffstat (limited to 'firmware/fx2/b100/fpga_load.c')
-rw-r--r--firmware/fx2/b100/fpga_load.c18
1 files changed, 4 insertions, 14 deletions
diff --git a/firmware/fx2/b100/fpga_load.c b/firmware/fx2/b100/fpga_load.c
index 54ef54ab3..394c9f50e 100644
--- a/firmware/fx2/b100/fpga_load.c
+++ b/firmware/fx2/b100/fpga_load.c
@@ -40,13 +40,6 @@ fpga_load_begin (void)
udelay (40); // wait 40 us
USRP_ALTERA_CONFIG |= bmALTERA_NCONFIG; // set NCONFIG high
- if (UC_BOARD_HAS_FPGA){
- // FIXME should really cap this loop with a counter so we
- // don't hang forever on a hardware failure.
- while ((USRP_ALTERA_CONFIG & bmALTERA_NSTATUS) == 0) // wait for NSTATUS to go high
- ;
- }
-
// ready to xfer now
return 1;
@@ -78,9 +71,9 @@ clock_out_config_byte (unsigned char bits)
for (i = 0; i < 8; i++){
- USRP_ALTERA_CONFIG = ((USRP_ALTERA_CONFIG & ~bmALTERA_DATA0) | ((bits & 1) ? bmALTERA_DATA0 : 0));
- USRP_ALTERA_CONFIG |= bmALTERA_DCLK; /* set DCLK to 1 */
- USRP_ALTERA_CONFIG &= ~bmALTERA_DCLK; /* set DCLK to 0 */
+ bitALTERA_DATA0 = bits & 1;
+ bitALTERA_DCLK = 1; /* set DCLK to 1 */
+ bitALTERA_DCLK = 0; /* set DCLK to 0 */
bits = bits >> 1;
}
@@ -180,10 +173,7 @@ fpga_load_end (void)
if (!UC_BOARD_HAS_FPGA) // always true if we don't have FPGA
return 1;
- if ((status & bmALTERA_NSTATUS) == 0) // failed to program
- return 0;
-
- if ((status & bmALTERA_CONF_DONE) == bmALTERA_CONF_DONE)
+ if (bitALTERA_CONF_DONE)
return 1; // everything's cool
// I don't think this should happen. It indicates that