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authorMatt Ettus <matt@ettus.com>2009-09-03 10:37:35 -0700
committerMatt Ettus <matt@ettus.com>2009-09-03 10:37:35 -0700
commit14036fe6e3bdcc62efbad909a15959f22b63a41f (patch)
treeffe34ac2ca39abc3d599fb52174c855969d23a0d /coregen/fifo_xlnx_2Kx36_2clk.veo
parentc811e886f5dbf61056834b3ef307ace1d5348aae (diff)
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made a new block ram based fifo, 64 (65) elements long, all fifos now have "enhanced level logic" for accurate fullness. Maybe this will help...
Diffstat (limited to 'coregen/fifo_xlnx_2Kx36_2clk.veo')
-rw-r--r--coregen/fifo_xlnx_2Kx36_2clk.veo4
1 files changed, 2 insertions, 2 deletions
diff --git a/coregen/fifo_xlnx_2Kx36_2clk.veo b/coregen/fifo_xlnx_2Kx36_2clk.veo
index bb691ff4d..af9191555 100644
--- a/coregen/fifo_xlnx_2Kx36_2clk.veo
+++ b/coregen/fifo_xlnx_2Kx36_2clk.veo
@@ -41,8 +41,8 @@ fifo_xlnx_2Kx36_2clk YourInstanceName (
.dout(dout), // Bus [35 : 0]
.empty(empty),
.full(full),
- .rd_data_count(rd_data_count), // Bus [10 : 0]
- .wr_data_count(wr_data_count)); // Bus [10 : 0]
+ .rd_data_count(rd_data_count), // Bus [11 : 0]
+ .wr_data_count(wr_data_count)); // Bus [11 : 0]
// INST_TAG_END ------ End INSTANTIATION Template ---------