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author | jcorgan <jcorgan@221aa14e-8319-0410-a670-987f0aec2ac5> | 2008-09-08 01:00:12 +0000 |
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committer | jcorgan <jcorgan@221aa14e-8319-0410-a670-987f0aec2ac5> | 2008-09-08 01:00:12 +0000 |
commit | 61f2f0214c5999ea42a368a4fc99f03d8eb28d1e (patch) | |
tree | e7e24a9adc05ff1422fe3ada9926a51634741b47 /control_lib/ram_wb_harvard.v | |
download | uhd-61f2f0214c5999ea42a368a4fc99f03d8eb28d1e.tar.gz uhd-61f2f0214c5999ea42a368a4fc99f03d8eb28d1e.tar.bz2 uhd-61f2f0214c5999ea42a368a4fc99f03d8eb28d1e.zip |
Merged r9433:9527 from features/gr-usrp2 into trunk. Adds usrp2 and gr-usrp2 top-level components. Trunk passes distcheck with mb-gcc installed, but currently not without them. The key issue is that when mb-gcc is not installed, the build system skips over the usrp2/firmware directory, and the firmware include files don't get put into the dist tarball. But we can't do the usual DIST_SUBDIRS method as the firmware is a subpackage.
git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@9528 221aa14e-8319-0410-a670-987f0aec2ac5
Diffstat (limited to 'control_lib/ram_wb_harvard.v')
-rw-r--r-- | control_lib/ram_wb_harvard.v | 86 |
1 files changed, 86 insertions, 0 deletions
diff --git a/control_lib/ram_wb_harvard.v b/control_lib/ram_wb_harvard.v new file mode 100644 index 000000000..c3efc12e0 --- /dev/null +++ b/control_lib/ram_wb_harvard.v @@ -0,0 +1,86 @@ + +// Dual ported RAM for Harvard architecture processors +// Does no forwarding +// Addresses are byte-oriented, so botton 2 address bits are ignored. FIXME +// AWIDTH of 13 gives 8K bytes. For Spartan 3, if the total RAM size is not a +// multiple of 8K then BRAM space is wasted + +module ram_wb_harvard #(parameter AWIDTH=13) + (input wb_clk_i, + input wb_rst_i, + + input [AWIDTH-1:0] iwb_adr_i, + input [31:0] iwb_dat_i, + output reg [31:0] iwb_dat_o, + input iwb_we_i, + output reg iwb_ack_o, + input iwb_stb_i, + input [3:0] iwb_sel_i, + + input [AWIDTH-1:0] dwb_adr_i, + input [31:0] dwb_dat_i, + output reg [31:0] dwb_dat_o, + input dwb_we_i, + output reg dwb_ack_o, + input dwb_stb_i, + input [3:0] dwb_sel_i); + + reg [7:0] ram0 [0:(1<<(AWIDTH-2))-1]; + reg [7:0] ram1 [0:(1<<(AWIDTH-2))-1]; + reg [7:0] ram2 [0:(1<<(AWIDTH-2))-1]; + reg [7:0] ram3 [0:(1<<(AWIDTH-2))-1]; + + // Instruction Read Port + always @(posedge wb_clk_i) + iwb_ack_o <= iwb_stb_i & ~iwb_ack_o; + + always @(posedge wb_clk_i) + iwb_dat_o[31:24] <= ram3[iwb_adr_i[AWIDTH-1:2]]; + always @(posedge wb_clk_i) + iwb_dat_o[23:16] <= ram2[iwb_adr_i[AWIDTH-1:2]]; + always @(posedge wb_clk_i) + iwb_dat_o[15:8] <= ram1[iwb_adr_i[AWIDTH-1:2]]; + always @(posedge wb_clk_i) + iwb_dat_o[7:0] <= ram0[iwb_adr_i[AWIDTH-1:2]]; + + always @(posedge wb_clk_i) + if(iwb_we_i & iwb_stb_i & iwb_sel_i[3]) + ram3[iwb_adr_i[AWIDTH-1:2]] <= iwb_dat_i[31:24]; + always @(posedge wb_clk_i) + if(iwb_we_i & iwb_stb_i & iwb_sel_i[2]) + ram2[iwb_adr_i[AWIDTH-1:2]] <= iwb_dat_i[23:16]; + always @(posedge wb_clk_i) + if(iwb_we_i & iwb_stb_i & iwb_sel_i[1]) + ram1[iwb_adr_i[AWIDTH-1:2]] <= iwb_dat_i[15:8]; + always @(posedge wb_clk_i) + if(iwb_we_i & iwb_stb_i & iwb_sel_i[0]) + ram0[iwb_adr_i[AWIDTH-1:2]] <= iwb_dat_i[7:0]; + + // Data Port + always @(posedge wb_clk_i) + dwb_ack_o <= dwb_stb_i & ~dwb_ack_o; + + always @(posedge wb_clk_i) + dwb_dat_o[31:24] <= ram3[dwb_adr_i[AWIDTH-1:2]]; + always @(posedge wb_clk_i) + dwb_dat_o[23:16] <= ram2[dwb_adr_i[AWIDTH-1:2]]; + always @(posedge wb_clk_i) + dwb_dat_o[15:8] <= ram1[dwb_adr_i[AWIDTH-1:2]]; + always @(posedge wb_clk_i) + dwb_dat_o[7:0] <= ram0[dwb_adr_i[AWIDTH-1:2]]; + + always @(posedge wb_clk_i) + if(dwb_we_i & dwb_stb_i & dwb_sel_i[3]) + ram3[dwb_adr_i[AWIDTH-1:2]] <= dwb_dat_i[31:24]; + always @(posedge wb_clk_i) + if(dwb_we_i & dwb_stb_i & dwb_sel_i[2]) + ram2[dwb_adr_i[AWIDTH-1:2]] <= dwb_dat_i[23:16]; + always @(posedge wb_clk_i) + if(dwb_we_i & dwb_stb_i & dwb_sel_i[1]) + ram1[dwb_adr_i[AWIDTH-1:2]] <= dwb_dat_i[15:8]; + always @(posedge wb_clk_i) + if(dwb_we_i & dwb_stb_i & dwb_sel_i[0]) + ram0[dwb_adr_i[AWIDTH-1:2]] <= dwb_dat_i[7:0]; + +endmodule // ram_wb_harvard + |