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| author | Josh Blum <josh@joshknows.com> | 2010-01-22 11:56:55 -0800 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2010-01-22 11:56:55 -0800 |
| commit | 7bf8a6df381a667134b55701993c6770d32bc76b (patch) | |
| tree | 4a298fb5450f7277b5aaf5210740ae18f818c9aa /control_lib/clock_control_tb.sav | |
| parent | 8f2c33eab9396185df259639082b7d1618585973 (diff) | |
| download | uhd-7bf8a6df381a667134b55701993c6770d32bc76b.tar.gz uhd-7bf8a6df381a667134b55701993c6770d32bc76b.tar.bz2 uhd-7bf8a6df381a667134b55701993c6770d32bc76b.zip | |
Moved usrp2 fpga files into usrp2 subdir.
Diffstat (limited to 'control_lib/clock_control_tb.sav')
| -rw-r--r-- | control_lib/clock_control_tb.sav | 28 |
1 files changed, 0 insertions, 28 deletions
diff --git a/control_lib/clock_control_tb.sav b/control_lib/clock_control_tb.sav deleted file mode 100644 index be4001dc5..000000000 --- a/control_lib/clock_control_tb.sav +++ /dev/null @@ -1,28 +0,0 @@ -[size] 1400 971 -[pos] -1 -1 -*-7.848898 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -@28 -clock_control_tb.aux_clk -clock_control_tb.reset -clock_control_tb.sclk -clock_control_tb.sdi -clock_control_tb.sdo -clock_control_tb.sen -@22 -clock_control_tb.clock_control.counter[7:0] -@28 -clock_control_tb.clock_control.done -@22 -clock_control_tb.clock_control.entry[5:0] -@28 -clock_control_tb.clock_control.read -clock_control_tb.clock_control.reset -clock_control_tb.clock_control.sclk -clock_control_tb.clock_control.w[1:0] -clock_control_tb.sen -clock_control_tb.sdo -clock_control_tb.sclk -clock_control_tb.clock_control.done -clock_control_tb.clock_control.start -@22 -clock_control_tb.clock_control.addr_data[20:0] |