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| author | Ashish Chaudhari <ashish@ettus.com> | 2014-08-20 09:06:32 -0700 |
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| committer | Ashish Chaudhari <ashish@ettus.com> | 2014-08-20 09:06:32 -0700 |
| commit | 72eae0503393966dfb2b961835ad1f9c5e5265e7 (patch) | |
| tree | 60db7af4b572f280f3017b8ba3a5f39657c58816 /CHANGELOG | |
| parent | 505c1d84fa7c53c0c640fab73b88c164671c7b91 (diff) | |
| parent | d31ffb2ef869b05fc4aeafd6bf588e62dca7ee82 (diff) | |
| download | uhd-72eae0503393966dfb2b961835ad1f9c5e5265e7.tar.gz uhd-72eae0503393966dfb2b961835ad1f9c5e5265e7.tar.bz2 uhd-72eae0503393966dfb2b961835ad1f9c5e5265e7.zip | |
Merge branch 'master' into ashish/cat_refactor_phase2
Diffstat (limited to 'CHANGELOG')
| -rw-r--r-- | CHANGELOG | 3 |
1 files changed, 3 insertions, 0 deletions
@@ -2,6 +2,9 @@ Change Log for Releases ============================== ## 003.007.002 +* Fixed X300 phase alignment issues +* Fixed CMake 2.6 incompatibility issues +* EEPROM burner improvements * Properly flushing PCIe chain on device to prevent stale data. * Adjusted bus clock rate in FPGA to improve timing. * Fixed issue where FPGA would fail to load FPGA image over PCIe. |