From a38fee789d66b87b9e25edcfcf47247fe11f8371 Mon Sep 17 00:00:00 2001
From: Martin Braun <martin.braun@ettus.com>
Date: Mon, 18 Aug 2014 23:36:02 +0200
Subject: Updated CHANGELOG for 3.7.2rc2

---
 CHANGELOG | 3 +++
 1 file changed, 3 insertions(+)

(limited to 'CHANGELOG')

diff --git a/CHANGELOG b/CHANGELOG
index 6a7856e9a..75067b3b2 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,9 @@ Change Log for Releases
 ==============================
 
 ## 003.007.002
+* Fixed X300 phase alignment issues
+* Fixed CMake 2.6 incompatibility issues
+* EEPROM burner improvements
 * Properly flushing PCIe chain on device to prevent stale data.
 * Adjusted bus clock rate in FPGA to improve timing.
 * Fixed issue where FPGA would fail to load FPGA image over PCIe.
-- 
cgit v1.2.3