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author | Ashish Chaudhari <ashish@ettus.com> | 2018-02-23 10:45:26 -0800 |
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committer | Ashish Chaudhari <ashish@ettus.com> | 2018-02-23 14:13:44 -0800 |
commit | c0a09e2f060045fb2954cc2194ac7eb48a873e4b (patch) | |
tree | 9dbdc1860fa911658b822888fb84182ca4589663 | |
parent | 9f67f624ad9de979aa1427b9bc91db15285c6c57 (diff) | |
download | uhd-c0a09e2f060045fb2954cc2194ac7eb48a873e4b.tar.gz uhd-c0a09e2f060045fb2954cc2194ac7eb48a873e4b.tar.bz2 uhd-c0a09e2f060045fb2954cc2194ac7eb48a873e4b.zip |
x300: Fixed processor clock rate in ZPU firmware
- Fix for regression that was introduced after the bus_clk freq change
- Firmware compat number bumped to 6.0 (was 5.2)
-rw-r--r-- | firmware/usrp3/x300/x300_defs.h | 2 | ||||
m--------- | fpga-src | 0 | ||||
-rw-r--r-- | host/lib/usrp/x300/x300_fw_common.h | 4 | ||||
-rw-r--r-- | images/manifest.txt | 4 |
4 files changed, 5 insertions, 5 deletions
diff --git a/firmware/usrp3/x300/x300_defs.h b/firmware/usrp3/x300/x300_defs.h index ed756d6fd..45457e6b5 100644 --- a/firmware/usrp3/x300/x300_defs.h +++ b/firmware/usrp3/x300/x300_defs.h @@ -4,7 +4,7 @@ #ifndef INCLUDED_X300_DEFS_H #define INCLUDED_X300_DEFS_H -#define CPU_CLOCK 83333333 +#define CPU_CLOCK 93750000 // Half of X300_BUS_CLOCK_RATE (187.5 MHz) #define MAIN_RAM_BASE 0x0000 #define PKT_RAM0_BASE 0x8000 #define SFP0_MAC_BASE 0xC000 diff --git a/fpga-src b/fpga-src -Subproject 2824f7b94b12bc8152900243830f7afc105d87e +Subproject 17918472e8fbdbf2cb2805581caaffa31492026 diff --git a/host/lib/usrp/x300/x300_fw_common.h b/host/lib/usrp/x300/x300_fw_common.h index 9cfae8e16..e240d8be6 100644 --- a/host/lib/usrp/x300/x300_fw_common.h +++ b/host/lib/usrp/x300/x300_fw_common.h @@ -21,8 +21,8 @@ extern "C" { #define X300_REVISION_COMPAT 7 #define X300_REVISION_MIN 2 -#define X300_FW_COMPAT_MAJOR 5 -#define X300_FW_COMPAT_MINOR 2 +#define X300_FW_COMPAT_MAJOR 6 +#define X300_FW_COMPAT_MINOR 0 #define X300_FPGA_COMPAT_MAJOR 0x23 //shared memory sections - in between the stack and the program space diff --git a/images/manifest.txt b/images/manifest.txt index f0a9fdcc0..5e20d35ad 100644 --- a/images/manifest.txt +++ b/images/manifest.txt @@ -1,8 +1,8 @@ # UHD Image Manifest File # Target hash url SHA256 # X300-Series -x3xx_x310_fpga_default fpga-1c568e6 x3xx/fpga-1c568e6/x3xx_x310_fpga_default.zip d441d1b51c2b4f12fd83b09b0d1937265f8b537dfb98f5a0e7bfe611a53abb7e -x3xx_x300_fpga_default fpga-1c568e6 x3xx/fpga-1c568e6/x3xx_x300_fpga_default.zip e2413b6690029481991155d79e760d2e68a443df0e7cb95672083737424837db +x3xx_x310_fpga_default fpga-1791847 x3xx/fpga-1791847/x3xx_x310_fpga_default.zip b18622e48f8a7e762c07ec90a563a5925f6098fe9a905fe1689c246696678142 +x3xx_x300_fpga_default fpga-1791847 x3xx/fpga-1791847/x3xx_x300_fpga_default.zip 2e184533f90abe17ce931848c8d2ca628b497399ac9bdd069f685ba9ce50aa3c # Example daughterboard targets (none currently exist) #x3xx_twinrx_cpld_default example_target #dboard_ubx_cpld_default example_target |