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author | Aaron Rossetto <aaron.rossetto@ni.com> | 2022-01-26 10:33:33 -0600 |
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committer | Aaron Rossetto <aaron.rossetto@ni.com> | 2022-02-07 07:20:39 -0600 |
commit | b229b0e796cec5d36de50b5cc5398bddda22b8d6 (patch) | |
tree | 359ee58868e05f992b89b4a0641e8f4e351c51df | |
parent | 7701b8e208f56d2bb3c6b6a592272191477da98c (diff) | |
download | uhd-b229b0e796cec5d36de50b5cc5398bddda22b8d6.tar.gz uhd-b229b0e796cec5d36de50b5cc5398bddda22b8d6.tar.bz2 uhd-b229b0e796cec5d36de50b5cc5398bddda22b8d6.zip |
mpm: x4xx: Update FPGA minor compat number
-rw-r--r-- | mpm/python/usrp_mpm/periph_manager/x4xx.py | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/mpm/python/usrp_mpm/periph_manager/x4xx.py b/mpm/python/usrp_mpm/periph_manager/x4xx.py index afa3d8a98..8c97dc043 100644 --- a/mpm/python/usrp_mpm/periph_manager/x4xx.py +++ b/mpm/python/usrp_mpm/periph_manager/x4xx.py @@ -44,7 +44,7 @@ X400_DEFAULT_MASTER_CLOCK_RATE = 122.88e6 X400_DEFAULT_TIME_SOURCE = X4xxClockMgr.TIME_SOURCE_INTERNAL X400_DEFAULT_CLOCK_SOURCE = X4xxClockMgr.CLOCK_SOURCE_INTERNAL X400_DEFAULT_ENABLE_PPS_EXPORT = True -X400_FPGA_COMPAT = (7, 3) +X400_FPGA_COMPAT = (7, 5) X400_DEFAULT_TRIG_DIRECTION = ClockingAuxBrdControl.DIRECTION_OUTPUT X400_MONITOR_THREAD_INTERVAL = 1.0 # seconds QSFPModuleConfig = namedtuple("QSFPModuleConfig", "modprs modsel devsymbol") |