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authorPhilip Balister <philip@opensdr.com>2010-08-11 01:06:49 +0000
committerPhilip Balister <philip@opensdr.com>2010-08-11 01:06:49 +0000
commitaf6636390b25381f59c6fbbe998f818b00923e10 (patch)
treec29b71c5a5314ac2f082fa5466db7b6fc81a5bc5
parentcb92934527964b8fda924925dbc12b18d5ae7fad (diff)
parent1301d665d621358ec6eccb41a020a4689cb0b566 (diff)
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Merge branch 'usrp_e' of ettus.sourcerepo.com:ettus/uhdpriv into usrp_e
-rw-r--r--host/lib/usrp/usrp_e/clock_ctrl.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/host/lib/usrp/usrp_e/clock_ctrl.cpp b/host/lib/usrp/usrp_e/clock_ctrl.cpp
index df649cee6..8a5bd1c6b 100644
--- a/host/lib/usrp/usrp_e/clock_ctrl.cpp
+++ b/host/lib/usrp/usrp_e/clock_ctrl.cpp
@@ -164,7 +164,7 @@ public:
void set_rx_dboard_clock_rate(double rate){
assert_has(get_rx_dboard_clock_rates(), rate, "rx dboard clock rate");
- size_t divider = size_t(rate/master_clock_rate);
+ size_t divider = size_t(master_clock_rate/rate);
//set the divider registers
set_clock_divider(divider,
_ad9522_regs.divider3_low_cycles,
@@ -194,7 +194,7 @@ public:
void set_tx_dboard_clock_rate(double rate){
assert_has(get_tx_dboard_clock_rates(), rate, "tx dboard clock rate");
- size_t divider = size_t(rate/master_clock_rate);
+ size_t divider = size_t(master_clock_rate/rate);
//set the divider registers
set_clock_divider(divider,
_ad9522_regs.divider2_low_cycles,