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author | Michael West <michael.west@ettus.com> | 2013-10-28 13:00:43 -0700 |
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committer | Michael West <michael.west@ettus.com> | 2013-10-28 13:00:43 -0700 |
commit | ab52e4ebca86000a105e0d9ae0f8b5f1b83f9021 (patch) | |
tree | 4ae3dcfce383cd4a1addd52f2b173d6f717b4a31 | |
parent | c2fb820b4d16a42a79b45d413409012261666080 (diff) | |
download | uhd-ab52e4ebca86000a105e0d9ae0f8b5f1b83f9021.tar.gz uhd-ab52e4ebca86000a105e0d9ae0f8b5f1b83f9021.tar.bz2 uhd-ab52e4ebca86000a105e0d9ae0f8b5f1b83f9021.zip |
CID 1104319: Fixed uninitialized scalar.
CID 1104318: Fixed uninitialized scalar.
-rw-r--r-- | host/lib/usrp/usrp2/usrp2_clk_regs.hpp | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/host/lib/usrp/usrp2/usrp2_clk_regs.hpp b/host/lib/usrp/usrp2/usrp2_clk_regs.hpp index 8b185eac0..45c0859d8 100644 --- a/host/lib/usrp/usrp2/usrp2_clk_regs.hpp +++ b/host/lib/usrp/usrp2/usrp2_clk_regs.hpp @@ -22,8 +22,9 @@ class usrp2_clk_regs_t { public: - usrp2_clk_regs_t(void) { ; } + usrp2_clk_regs_t(void):test(0),fpga(0),adc(0),dac(0),serdes(0),exp(0),tx_db(0),rx_db(0) { ; } usrp2_clk_regs_t(usrp2_iface::rev_type rev) { + fpga = adc = serdes = exp = tx_db = 0; test = 0; fpga = 1; dac = 3; @@ -54,7 +55,7 @@ public: //dont throw, it may be unitialized break; } - + rx_db = 7; } |