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author | Mark Meserve <mark.meserve@ni.com> | 2018-06-13 14:11:48 -0500 |
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committer | Martin Braun <martin.braun@ettus.com> | 2018-06-14 06:59:41 -0700 |
commit | a1fa68d7300402357231261c3d52613bb78abba1 (patch) | |
tree | 44aa29849ac774031cedff705081a237d31713c1 | |
parent | f473df0a0bc563d76d9d806ca6671c51638a5dd2 (diff) | |
download | uhd-a1fa68d7300402357231261c3d52613bb78abba1.tar.gz uhd-a1fa68d7300402357231261c3d52613bb78abba1.tar.bz2 uhd-a1fa68d7300402357231261c3d52613bb78abba1.zip |
lmx2592: correct bit 15 of register 39
-rwxr-xr-x | host/lib/ic_reg_maps/gen_lmx2592_regs.py | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/host/lib/ic_reg_maps/gen_lmx2592_regs.py b/host/lib/ic_reg_maps/gen_lmx2592_regs.py index c39665ee9..8689c487d 100755 --- a/host/lib/ic_reg_maps/gen_lmx2592_regs.py +++ b/host/lib/ic_reg_maps/gen_lmx2592_regs.py @@ -196,7 +196,7 @@ reg38_reserved1 38[13:15] 0x0 ######################################################################## reg39_reserved0 39[0:7] 0x4 pfd_dly 39[8:13] 2 4_clk_delay=1, 6_clk_delay=2, 8_clk_delay=4, 12_clk_delay=8, 16_clk_delay=16 -reg39_reserved1 39[14:15] 0x4 +reg39_reserved1 39[14:15] 0x2 ######################################################################## ## address 40 ######################################################################## |