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author | Matt Ettus <matt@ettus.com> | 2011-05-19 18:57:38 -0700 |
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committer | Matt Ettus <matt@ettus.com> | 2011-06-08 10:52:52 -0700 |
commit | 967ca16549a269f9eed02608b5e6e2d9ac8fda29 (patch) | |
tree | 8a01eaeaf005e7f59630fc00ceb39ae94456a10c | |
parent | 6c28203a6a8c559bae81a09be41fa5a2e06a7188 (diff) | |
download | uhd-967ca16549a269f9eed02608b5e6e2d9ac8fda29.tar.gz uhd-967ca16549a269f9eed02608b5e6e2d9ac8fda29.tar.bz2 uhd-967ca16549a269f9eed02608b5e6e2d9ac8fda29.zip |
u2/u2p: use all 24 bits from the rx_frontend
-rw-r--r-- | usrp2/top/N2x0/u2plus_core.v | 2 | ||||
-rw-r--r-- | usrp2/top/USRP2/u2_core.v | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/usrp2/top/N2x0/u2plus_core.v b/usrp2/top/N2x0/u2plus_core.v index 3d67b0dcf..899ee472b 100644 --- a/usrp2/top/N2x0/u2plus_core.v +++ b/usrp2/top/N2x0/u2plus_core.v @@ -585,7 +585,7 @@ module u2plus_core // ///////////////////////////////////////////////////////////////////////// // ADC Frontend - wire [17:0] adc_i, adc_q; + wire [23:0] adc_i, adc_q; rx_frontend #(.BASE(SR_RX_FRONT)) rx_frontend (.clk(dsp_clk),.rst(dsp_rst), diff --git a/usrp2/top/USRP2/u2_core.v b/usrp2/top/USRP2/u2_core.v index 0821277cc..1c75f50fc 100644 --- a/usrp2/top/USRP2/u2_core.v +++ b/usrp2/top/USRP2/u2_core.v @@ -584,7 +584,7 @@ module u2_core // ///////////////////////////////////////////////////////////////////////// // ADC Frontend - wire [17:0] adc_i, adc_q; + wire [23:0] adc_i, adc_q; rx_frontend #(.BASE(SR_RX_FRONT)) rx_frontend (.clk(dsp_clk),.rst(dsp_rst), |