Merge branch 'maint' into fpga/removed_planahead

4 files changed, 53 insertions, 31 deletions

diff --git a/host/lib/transport/libusb1_base.cpp b/host/lib/transport/libusb1_base.cpp
index 8bd0f4354..23117f128 100644
--- a/host/lib/transport/libusb1_base.cpp
+++ b/host/lib/transport/libusb1_base.cpp
@@ -21,6 +21,7 @@
 #include <uhd/utils/log.hpp>
 #include <uhd/utils/tasks.hpp>
 #include <uhd/types/dict.hpp>
+#include <uhd/types/serial.hpp>
 #include <boost/weak_ptr.hpp>
 #include <boost/thread/mutex.hpp>
 #include <boost/foreach.hpp>
@@ -184,7 +185,14 @@ public:
         );
         if (ret < 0) return ""; //on error, just return empty string
 
-        return std::string((char *)buff, ret);
+        std::string string_descriptor((char *)buff, ret);
+        byte_vector_t string_vec(string_descriptor.begin(), string_descriptor.end());
+        std::string out;
+        BOOST_FOREACH(boost::uint8_t byte, string_vec){
+            if (byte < 32 or byte > 127) return out;
+            out += byte;
+        }
+        return out;
     }
 
 private:
diff --git a/host/lib/usrp/b200/b200_impl.cpp b/host/lib/usrp/b200/b200_impl.cpp
index 8ed8e99af..74e61143b 100644
--- a/host/lib/usrp/b200/b200_impl.cpp
+++ b/host/lib/usrp/b200/b200_impl.cpp
@@ -510,7 +510,7 @@ void b200_impl::setup_radio(const size_t dspno)
     // create rx dsp control objects
     ////////////////////////////////////////////////////////////////////
     perif.framer = rx_vita_core_3000::make(perif.ctrl, TOREG(SR_RX_CTRL));
-    perif.ddc = rx_dsp_core_3000::make(perif.ctrl, TOREG(SR_RX_DSP));
+    perif.ddc = rx_dsp_core_3000::make(perif.ctrl, TOREG(SR_RX_DSP), true /*is_b200?*/);
     perif.ddc->set_link_rate(10e9/8); //whatever
     _tree->access<double>(mb_path / "tick_rate")
         .subscribe(boost::bind(&rx_vita_core_3000::set_tick_rate, perif.framer, _1))
diff --git a/host/lib/usrp/cores/rx_dsp_core_3000.cpp b/host/lib/usrp/cores/rx_dsp_core_3000.cpp
index 67d0be017..86846667f 100644
--- a/host/lib/usrp/cores/rx_dsp_core_3000.cpp
+++ b/host/lib/usrp/cores/rx_dsp_core_3000.cpp
@@ -1,5 +1,5 @@
 //
-// Copyright 2011-2013 Ettus Research LLC
+// Copyright 2011-2014 Ettus Research LLC
 //
 // This program is free software: you can redistribute it and/or modify
 // it under the terms of the GNU General Public License as published by
@@ -48,9 +48,10 @@ class rx_dsp_core_3000_impl : public rx_dsp_core_3000{
 public:
     rx_dsp_core_3000_impl(
         wb_iface::sptr iface,
-        const size_t dsp_base
+        const size_t dsp_base,
+        const bool is_b200
     ):
-        _iface(iface), _dsp_base(dsp_base)
+        _iface(iface), _dsp_base(dsp_base), _is_b200(is_b200)
     {
         // previously uninitialized - assuming zero for all
         _link_rate = _host_extra_scaling = _fxpt_scalar_correction = 0.0;
@@ -119,32 +120,43 @@ public:
             hb1 = 1;
             decim /= 2;
         }
-        if (decim % 2 == 0){
+        //the third half-band is not supported by the B200
+        if (decim % 2 == 0 && !_is_b200){
             hb2 = 1;
             decim /= 2;
         }
 
-	// Encode Halfband config for setting register programming.
-	if (hb2) { // Implies HB1 and HB0 also asserted
-	  hb_enable=3;
-	} else if (hb1) { // Implies HB0 is also asserted
-	  hb_enable=2;
-	} else if (hb0) {
-	  hb_enable=1;
-	} else {
-	  hb_enable=0;
-	}
-
-        _iface->poke32(REG_DSP_RX_DECIM,  (hb_enable << 8) | (decim & 0xff));
-
-        if (decim > 1 and hb0 == 0 and hb1 == 0 and hb2 == 0)
-        {
-            UHD_MSG(warning) << boost::format(
-                "The requested decimation is odd; the user should expect passband CIC rolloff.\n"
-                "Select an even decimation to ensure that a halfband filter is enabled.\n"
-		"Decimations factorable by 4 will enable 2 halfbands, those factorable by 8 will enable 3 halfbands.\n"
-                "decimation = dsp_rate/samp_rate -> %d = (%f MHz)/(%f MHz)\n"
-            ) % decim_rate % (_tick_rate/1e6) % (rate/1e6);
+        if (_is_b200) {
+            _iface->poke32(REG_DSP_RX_DECIM, (hb1 << 9) | (hb0 << 8) | (decim & 0xff));
+
+            if (decim > 1 and hb0 == 0 and hb1 == 0) {
+                UHD_MSG(warning) << boost::format(
+                    "The requested decimation is odd; the user should expect CIC rolloff.\n"
+                    "Select an even decimation to ensure that a halfband filter is enabled.\n"
+                    "decimation = dsp_rate/samp_rate -> %d = (%f MHz)/(%f MHz)\n"
+                ) % decim_rate % (_tick_rate/1e6) % (rate/1e6);
+            }
+        } else {
+            // Encode Halfband config for setting register programming.
+            if (hb2) { // Implies HB1 and HB0 also asserted
+                hb_enable=3;
+            } else if (hb1) { // Implies HB0 is also asserted
+                hb_enable=2;
+            } else if (hb0) {
+                hb_enable=1;
+            } else {
+                hb_enable=0;
+            }
+            _iface->poke32(REG_DSP_RX_DECIM,  (hb_enable << 8) | (decim & 0xff));
+
+            if (decim > 1 and hb0 == 0 and hb1 == 0 and hb2 == 0) {
+                UHD_MSG(warning) << boost::format(
+                    "The requested decimation is odd; the user should expect passband CIC rolloff.\n"
+                    "Select an even decimation to ensure that a halfband filter is enabled.\n"
+                    "Decimations factorable by 4 will enable 2 halfbands, those factorable by 8 will enable 3 halfbands.\n"
+                    "decimation = dsp_rate/samp_rate -> %d = (%f MHz)/(%f MHz)\n"
+                ) % decim_rate % (_tick_rate/1e6) % (rate/1e6);
+            }
         }
 
         // Calculate CIC decimation (i.e., without halfband decimators)
@@ -223,11 +235,12 @@ public:
 private:
     wb_iface::sptr _iface;
     const size_t _dsp_base;
+    const bool _is_b200;    //TODO: Obsolete this when we switch to the new DDC on the B200
     double _tick_rate, _link_rate;
     double _scaling_adjustment, _dsp_extra_scaling, _host_extra_scaling, _fxpt_scalar_correction;
 };
 
-rx_dsp_core_3000::sptr rx_dsp_core_3000::make(wb_iface::sptr iface, const size_t dsp_base)
+rx_dsp_core_3000::sptr rx_dsp_core_3000::make(wb_iface::sptr iface, const size_t dsp_base, const bool is_b200 /* = false */)
 {
-    return sptr(new rx_dsp_core_3000_impl(iface, dsp_base));
+    return sptr(new rx_dsp_core_3000_impl(iface, dsp_base, is_b200));
 }
diff --git a/host/lib/usrp/cores/rx_dsp_core_3000.hpp b/host/lib/usrp/cores/rx_dsp_core_3000.hpp
index 02e5587a2..f35e1e3d3 100644
--- a/host/lib/usrp/cores/rx_dsp_core_3000.hpp
+++ b/host/lib/usrp/cores/rx_dsp_core_3000.hpp
@@ -1,5 +1,5 @@
 //
-// Copyright 2011-2013 Ettus Research LLC
+// Copyright 2011-2014 Ettus Research LLC
 //
 // This program is free software: you can redistribute it and/or modify
 // it under the terms of the GNU General Public License as published by
@@ -33,7 +33,8 @@ public:
 
     static sptr make(
         uhd::wb_iface::sptr iface,
-        const size_t dsp_base
+        const size_t dsp_base,
+        const bool is_b200 = false  //TODO: Obsolete this when we switch to the new DDC on the B200
     );
 
     virtual void set_mux(const std::string &mode, const bool fe_swapped = false) = 0;