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author | Martin Braun <martin.braun@ettus.com> | 2021-08-26 10:39:23 +0200 |
---|---|---|
committer | Aaron Rossetto <aaron.rossetto@ni.com> | 2021-08-30 12:31:23 -0500 |
commit | 919043f305efdd29fbdf586e9cde95d9507150e8 (patch) | |
tree | 383215c83bd3d91949d3d84e9e6fd07608c1f829 | |
parent | 7c794c4bd384bbcae051e024086f2293457ddd65 (diff) | |
download | uhd-919043f305efdd29fbdf586e9cde95d9507150e8.tar.gz uhd-919043f305efdd29fbdf586e9cde95d9507150e8.tar.bz2 uhd-919043f305efdd29fbdf586e9cde95d9507150e8.zip |
rfnoc: ddc: Improve unit tests and documentation
The previous commit fixed a bug in the DUC, where get_frequency_range()
reported incorrect values. The DDC did not have this bug, but we port
the updates to the unit tests and the documentation from the DUC to the
DDC for consistency's sake.
-rw-r--r-- | host/include/uhd/rfnoc/ddc_block_control.hpp | 7 | ||||
-rw-r--r-- | host/tests/rfnoc_block_tests/ddc_block_test.cpp | 24 |
2 files changed, 26 insertions, 5 deletions
diff --git a/host/include/uhd/rfnoc/ddc_block_control.hpp b/host/include/uhd/rfnoc/ddc_block_control.hpp index 834fa0aa3..053b78c4c 100644 --- a/host/include/uhd/rfnoc/ddc_block_control.hpp +++ b/host/include/uhd/rfnoc/ddc_block_control.hpp @@ -79,6 +79,13 @@ public: /*! Return the range of frequencies that \p chan can be set to. * + * The frequency shifter is the first component in the DDC, and thus can + * shift frequencies (digitally) between -get_input_rate()/2 + * and +get_input_rate()/2. + * + * The returned values are in Hz (not normalized frequencies) and are valid + * inputs for set_freq(). + * * \return The range of frequencies that the DDC can shift the input by */ virtual uhd::freq_range_t get_frequency_range(const size_t chan) const = 0; diff --git a/host/tests/rfnoc_block_tests/ddc_block_test.cpp b/host/tests/rfnoc_block_tests/ddc_block_test.cpp index d32dd0aec..3656620f9 100644 --- a/host/tests/rfnoc_block_tests/ddc_block_test.cpp +++ b/host/tests/rfnoc_block_tests/ddc_block_test.cpp @@ -36,6 +36,7 @@ BOOST_AUTO_TEST_CASE(test_ddc_block) constexpr size_t num_chans = 4; constexpr noc_id_t noc_id = DDC_BLOCK; constexpr int TEST_DECIM = 20; + constexpr double DEFAULT_RATE = 200e6; // Matches typical MCR of X310 auto block_container = get_mock_block(noc_id, num_chans, num_chans, uhd::device_addr_t("foo=bar")); @@ -74,17 +75,24 @@ BOOST_AUTO_TEST_CASE(test_ddc_block) mock_source_term.set_edge_property<double>( "scaling", 1.0, {res_source_info::OUTPUT_EDGE, 0}); mock_source_term.set_edge_property<double>( - "samp_rate", 1.0, {res_source_info::OUTPUT_EDGE, 0}); + "samp_rate", DEFAULT_RATE, {res_source_info::OUTPUT_EDGE, 0}); constexpr size_t NEW_MTU = 4000; mock_source_term.set_edge_property<size_t>( "mtu", NEW_MTU, {res_source_info::OUTPUT_EDGE, 0}); +#define CHECK_INPUT_RATE(req_rate) \ + BOOST_REQUIRE_CLOSE(mock_source_term.get_edge_property<double>( \ + "samp_rate", {res_source_info::OUTPUT_EDGE, 0}), \ + req_rate, \ + 1e-6); + UHD_LOG_INFO("TEST", "Creating graph..."); graph.connect(&mock_source_term, test_ddc.get(), edge_info); graph.connect(test_ddc.get(), &mock_sink_term, edge_info); UHD_LOG_INFO("TEST", "Committing graph..."); graph.commit(); UHD_LOG_INFO("TEST", "Commit complete."); + CHECK_INPUT_RATE(DEFAULT_RATE); // We need to set the decimation again, because the rates will screw it // change it w.r.t. to the previous setting test_ddc->set_property<int>("decim", TEST_DECIM, 0); @@ -94,20 +102,26 @@ BOOST_AUTO_TEST_CASE(test_ddc_block) == mock_sink_term.get_edge_property<double>( "samp_rate", {res_source_info::INPUT_EDGE, 0}) * TEST_DECIM); + // Input rate should remain unchanged + CHECK_INPUT_RATE(DEFAULT_RATE); BOOST_CHECK(mock_sink_term.get_edge_property<double>( "scaling", {res_source_info::INPUT_EDGE, 0}) != 1.0); - UHD_LOG_INFO("TEST", "Setting freq to 1/8 of input rate"); - constexpr double TEST_FREQ = 1.0 / 8; + BOOST_CHECK_CLOSE(test_ddc->get_frequency_range(0).start(), -DEFAULT_RATE / 2, 1e-6); + BOOST_CHECK_CLOSE(test_ddc->get_frequency_range(0).stop(), DEFAULT_RATE / 2, 1e-6); + UHD_LOG_INFO("TEST", + "Setting freq to 1/8 of input rate (to " << (DEFAULT_RATE / 8) / 1e6 << " MHz)"); + constexpr double TEST_FREQ = DEFAULT_RATE / 8; test_ddc->set_property<double>("freq", TEST_FREQ, 0); const uint32_t freq_word_1 = ddc_reg_iface->write_memory.at(ddc_block_control::SR_FREQ_ADDR); BOOST_REQUIRE(freq_word_1 != 0); - UHD_LOG_INFO("TEST", "Doubling input rate (to 2.0)"); + UHD_LOG_INFO( + "TEST", "Doubling input rate (to " << (DEFAULT_RATE / 4) / 1e6 << " MHz)"); // Now this should change the freq word, but not the absolute frequency mock_source_term.set_edge_property<double>( - "samp_rate", 2.0, {res_source_info::OUTPUT_EDGE, 0}); + "samp_rate", DEFAULT_RATE * 2, {res_source_info::OUTPUT_EDGE, 0}); const double freq_word_2 = ddc_reg_iface->write_memory.at(ddc_block_control::SR_FREQ_ADDR); // The frequency word is the phase increment, which will halve. We skirt |