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| author | Aaron Rossetto <aaron.rossetto@ni.com> | 2022-02-08 09:32:25 -0600 |
|---|---|---|
| committer | Aaron Rossetto <aaron.rossetto@ni.com> | 2022-02-08 15:23:57 -0600 |
| commit | 7956d0dbc34bf83c17d57925f69f43663213f823 (patch) | |
| tree | feee2bb967a34bcd0f41563f953c1998dea64d1b | |
| parent | 6e2a65e700de05a0da557dd9d5125b9867cb029b (diff) | |
| download | uhd-7956d0dbc34bf83c17d57925f69f43663213f823.tar.gz uhd-7956d0dbc34bf83c17d57925f69f43663213f823.tar.bz2 uhd-7956d0dbc34bf83c17d57925f69f43663213f823.zip | |
images: Revert x4xx manifest and FPGA compat update
| -rw-r--r-- | images/manifest.txt | 2 | ||||
| -rw-r--r-- | mpm/python/usrp_mpm/periph_manager/x4xx.py | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/images/manifest.txt b/images/manifest.txt index a2eff5515..b864ea8d7 100644 --- a/images/manifest.txt +++ b/images/manifest.txt @@ -2,7 +2,7 @@ # Target hash url SHA256 # X410-Series -x4xx_x410_fpga_default uhd-739b37b x4xx/uhd-739b37b/x4xx_x410_fpga_default-g739b37b.zip c1e97652e6a5a1c8662f2ad1bc61728c181223b6cbf355f96e96de8cec6b5826 +x4xx_x410_fpga_default uhd-439770b x4xx/uhd-439770b/x4xx_x410_fpga_default-g439770b.zip 6be1c4ae50841b857bcc294b0f7029e0ae27574b703498e5d9562d3c8b6d2b0b x4xx_x410_cpld_default uhd-6fd9f37 x4xx/uhd-6fd9f37/x4xx_x410_cpld_default-g6fd9f37.zip 74e09bedda84105258484217d4dbf68860ce2079d27cf8352952fe8e4d727e93 x4xx_zbx_cpld_default uhd-d5c2750 x4xx/uhd-d5c2750/x4xx_zbx_cpld_default-gd5c2750.zip f4e2fce5a57052b0efd9b4b247dd816d842de63b03091bd4f030dc01fd5a3fd0 # X410-Series Filesystems diff --git a/mpm/python/usrp_mpm/periph_manager/x4xx.py b/mpm/python/usrp_mpm/periph_manager/x4xx.py index 8c97dc043..afa3d8a98 100644 --- a/mpm/python/usrp_mpm/periph_manager/x4xx.py +++ b/mpm/python/usrp_mpm/periph_manager/x4xx.py @@ -44,7 +44,7 @@ X400_DEFAULT_MASTER_CLOCK_RATE = 122.88e6 X400_DEFAULT_TIME_SOURCE = X4xxClockMgr.TIME_SOURCE_INTERNAL X400_DEFAULT_CLOCK_SOURCE = X4xxClockMgr.CLOCK_SOURCE_INTERNAL X400_DEFAULT_ENABLE_PPS_EXPORT = True -X400_FPGA_COMPAT = (7, 5) +X400_FPGA_COMPAT = (7, 3) X400_DEFAULT_TRIG_DIRECTION = ClockingAuxBrdControl.DIRECTION_OUTPUT X400_MONITOR_THREAD_INTERVAL = 1.0 # seconds QSFPModuleConfig = namedtuple("QSFPModuleConfig", "modprs modsel devsymbol") |