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authorMatt Ettus <matt@ettus.com>2011-04-04 08:16:33 -0700
committerMatt Ettus <matt@ettus.com>2011-06-08 10:52:51 -0700
commit47967a432248cacf6b17add35263308ecc0526f4 (patch)
treebb33d8f9883036c3e40b0f3f7fda1765b6f8c471
parent2bad9b4d2711ad3aeef2e3b35153b2463874940e (diff)
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dsp: pass the error through in the rounding function
-rw-r--r--usrp2/sdr_lib/round_reg.v13
1 files changed, 9 insertions, 4 deletions
diff --git a/usrp2/sdr_lib/round_reg.v b/usrp2/sdr_lib/round_reg.v
index aa0972dab..6f2e974d7 100644
--- a/usrp2/sdr_lib/round_reg.v
+++ b/usrp2/sdr_lib/round_reg.v
@@ -27,13 +27,18 @@ module round_reg
parameter bits_out=0)
(input clk,
input [bits_in-1:0] in,
- output reg [bits_out-1:0] out);
+ output reg [bits_out-1:0] out,
+ output reg [bits_in-bits_out:0] err);
wire [bits_out-1:0] temp;
-
- round #(.bits_in(bits_in),.bits_out(bits_out)) round (.in(in),.out(temp));
+ wire [bits_in-bits_out:0] err_temp;
+
+ round #(.bits_in(bits_in),.bits_out(bits_out)) round (.in(in),.out(temp), .err(err_temp));
always @(posedge clk)
out <= temp;
+
+ always @(posedge clk)
+ err <= err_temp;
-endmodule // round
+endmodule // round_reg