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authorHumberto Jimenez <humberto.jimenez@ni.com>2020-01-29 16:32:15 -0600
committerWade Fife <32272501+wordimont@users.noreply.github.com>2020-02-05 09:26:57 -0600
commit401fcd11be0cab028a619c9bc4a75fe6aa856369 (patch)
tree3d5091242206c889583c6e354331bc1b3f8d3b67
parent40d21737061258a4e4584bc4233247a4186d3452 (diff)
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fixup! lib: add option for output register in pps generator
-rw-r--r--fpga/usrp3/lib/timing/pps_generator.v2
1 files changed, 1 insertions, 1 deletions
diff --git a/fpga/usrp3/lib/timing/pps_generator.v b/fpga/usrp3/lib/timing/pps_generator.v
index 288fdccb9..1ab02783f 100644
--- a/fpga/usrp3/lib/timing/pps_generator.v
+++ b/fpga/usrp3/lib/timing/pps_generator.v
@@ -14,7 +14,7 @@ module pps_generator #(
input reset,
output pps
);
- reg [31:0] count;
+ reg [31:0] count = 32'h0;
always @(posedge clk) begin
if (reset) begin