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authorThomas Tsou <ttsou@vt.edu>2010-08-27 12:01:16 -0700
committerThomas Tsou <ttsou@vt.edu>2010-08-27 12:01:16 -0700
commit37adb4805aeef665acd13cf975c5b59cf855d851 (patch)
tree30dc2d816f447ea9b5416c8e21fd7bac5d4ec6a9
parentc9569736930cf436f340d70c7537a5f46f3ab3aa (diff)
parent98510590c453bf366d29e488c1d3b54ec022f919 (diff)
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Merge branch 'usrp1_cleanup' into usrp1
-rw-r--r--host/lib/transport/libusb1_device_handle.cpp13
-rw-r--r--host/lib/usrp/usrp1/dsp_impl.cpp27
-rw-r--r--host/lib/usrp/usrp1/mboard_impl.cpp76
-rw-r--r--host/lib/usrp/usrp1/usrp1_impl.cpp2
4 files changed, 53 insertions, 65 deletions
diff --git a/host/lib/transport/libusb1_device_handle.cpp b/host/lib/transport/libusb1_device_handle.cpp
index f80090f15..5289f668f 100644
--- a/host/lib/transport/libusb1_device_handle.cpp
+++ b/host/lib/transport/libusb1_device_handle.cpp
@@ -88,6 +88,16 @@ usb_device_handle::sptr make_usb_device_handle(libusb_device *dev)
device_addr));
}
+bool check_fsf_device(libusb_device *dev)
+{
+ libusb_device_descriptor desc;
+
+ if (libusb_get_device_descriptor(dev, &desc) < 0) {
+ UHD_ASSERT_THROW("USB: failed to get device descriptor");
+ }
+
+ return desc.idVendor == 0xfffe;
+}
std::vector<usb_device_handle::sptr> usb_device_handle::get_device_list()
{
@@ -105,7 +115,8 @@ std::vector<usb_device_handle::sptr> usb_device_handle::get_device_list()
ssize_t i = 0;
for (i = 0; i < cnt; i++) {
libusb_device *dev = list[i];
- device_list.push_back(make_usb_device_handle(dev));
+ if (check_fsf_device(dev))
+ device_list.push_back(make_usb_device_handle(dev));
}
libusb_free_device_list(list, 0);
diff --git a/host/lib/usrp/usrp1/dsp_impl.cpp b/host/lib/usrp/usrp1/dsp_impl.cpp
index ddd1e811b..d5a88fa2d 100644
--- a/host/lib/usrp/usrp1/dsp_impl.cpp
+++ b/host/lib/usrp/usrp1/dsp_impl.cpp
@@ -78,13 +78,23 @@ void usrp1_impl::rx_dsp_set(const wax::obj &key, const wax::obj &val)
switch(key.as<dsp_prop_t>()) {
case DSP_PROP_FREQ_SHIFT: {
double new_freq = val.as<double>();
- _iface->poke32(FR_RX_FREQ_0,
- -dsp_type1::calc_cordic_word_and_update(new_freq, _clock_ctrl->get_master_clock_freq()));
- _tx_dsp_freq = new_freq;
+ boost::uint32_t reg_word = dsp_type1::calc_cordic_word_and_update(
+ new_freq, _clock_ctrl->get_master_clock_freq());
+
+ //TODO TODO TODO TODO TODO TODO TODO TODO TODO
+ //
+ // Handle multiple receive channels / DDC's
+ //
+ //TODO TODO TODO TODO TODO TODO TODO TODO TODO
+ _iface->poke32(FR_RX_FREQ_0, reg_word);
+ _iface->poke32(FR_RX_FREQ_1, reg_word);
+ _iface->poke32(FR_RX_FREQ_2, reg_word);
+ _iface->poke32(FR_RX_FREQ_3, reg_word);
+
+ _rx_dsp_freq = new_freq;
return;
}
case DSP_PROP_HOST_RATE: {
- //FIXME: Stop and resume streaming during set?
unsigned int rate =
_clock_ctrl->get_master_clock_freq() / val.as<double>();
@@ -95,6 +105,7 @@ void usrp1_impl::rx_dsp_set(const wax::obj &key, const wax::obj &val)
}
_rx_dsp_decim = rate;
+ //TODO Poll every 100ms. Make it selectable?
_rx_samps_per_poll_interval = 0.1 * _clock_ctrl->get_master_clock_freq() / rate;
_iface->poke32(FR_DECIM_RATE, _rx_dsp_decim/2 - 1);
@@ -157,7 +168,11 @@ void usrp1_impl::tx_dsp_set(const wax::obj &key, const wax::obj &val)
{
switch(key.as<dsp_prop_t>()) {
- // TODO: Set both codec frequencies until we have duality properties
+ //TODO TODO TODO TODO TODO TODO TODO TODO TODO TODO TODO TODO
+ //
+ // Set both codec frequencies until we have duality properties
+ //
+ //TODO TODO TODO TODO TODO TODO TODO TODO TODO TODO TODO TODO
case DSP_PROP_FREQ_SHIFT: {
double new_freq = val.as<double>();
_codec_ctrls[DBOARD_SLOT_A]->set_duc_freq(new_freq);
@@ -177,6 +192,8 @@ void usrp1_impl::tx_dsp_set(const wax::obj &key, const wax::obj &val)
}
_tx_dsp_interp = rate;
+
+ //TODO Poll every 100ms. Make it selectable?
_tx_samps_per_poll_interval = 0.1 * _clock_ctrl->get_master_clock_freq() * 2 / rate;
_iface->poke32(FR_INTERP_RATE, _tx_dsp_interp / 4 - 1);
diff --git a/host/lib/usrp/usrp1/mboard_impl.cpp b/host/lib/usrp/usrp1/mboard_impl.cpp
index 612dc732c..0b1335acf 100644
--- a/host/lib/usrp/usrp1/mboard_impl.cpp
+++ b/host/lib/usrp/usrp1/mboard_impl.cpp
@@ -18,6 +18,7 @@
#include "usrp1_impl.hpp"
#include "usrp_commands.h"
#include "fpga_regs_standard.h"
+#include "fpga_regs_common.h"
#include <uhd/usrp/misc_utils.hpp>
#include <uhd/usrp/mboard_props.hpp>
#include <uhd/usrp/dboard_props.hpp>
@@ -168,65 +169,24 @@ void usrp1_impl::mboard_init(void)
boost::bind(&usrp1_impl::mboard_get, this, _1, _2),
boost::bind(&usrp1_impl::mboard_set, this, _1, _2));
- /*
- * Basic initialization
- */
- _iface->poke32( 13, 0x00000000); //FR_MODE
- _iface->poke32( 14, 0x00000000); //FR_DEBUG_EN
- _iface->poke32( 1, 0x00000001); //FR_RX_SAMPLE_RATE_DEV
- _iface->poke32( 0, 0x00000003); //FR_TX_SAMPLE_RATE_DEV
- _iface->poke32( 15, 0x0000000f); //FR_DC_OFFSET_CL_EN
-
- /*
- * Reset codecs
- */
- _iface->poke32( 16, 0x00000000); //FR_ADC_OFFSET_0
- _iface->poke32( 17, 0x00000000); //FR_ADC_OFFSET_1
- _iface->poke32( 18, 0x00000000); //FR_ADC_OFFSET_2
- _iface->poke32( 19, 0x00000000); //FR_ADC_OFFSET_3
-
- /*
- * Reset GPIO masks
- */
- _iface->poke32( 6, 0xffff0000); //FR_OE_1
- _iface->poke32( 10, 0xffff0000); //FR_IO_1
- _iface->poke32( 8, 0xffff0000); //FR_OE_3
- _iface->poke32( 12, 0xffff0000); //FR_IO_3
-
- /*
- * Disable ATR masks and reset state registers
- */
- _iface->poke32( 23, 0x00000000); //FR_ATR_MASK_1
- _iface->poke32( 24, 0x00000000); //FR_ATR_TXVAL_1
- _iface->poke32( 25, 0x00000000); //FR_ATR_RXVAL_1
- _iface->poke32( 29, 0x00000000); //FR_ATR_MASK_3
- _iface->poke32( 30, 0x00000000); //FR_ATR_TXVAL_3
- _iface->poke32( 31, 0x00000000); //FR_ATR_RXVAL_3
-
- /*
- * Set defaults for RX format, decimation, and mux
- */
- _iface->poke32( 49, 0x00000300); //FR_RX_FORMAT
- _iface->poke32( 38, 0x000e4e41); //FR_RX_MUX
-
- /*
- * Set defaults for TX format, interpolation, and mux
- */
- _iface->poke32( 48, 0x00000000); //FR_TX_FORMAT
- _iface->poke32( 39, 0x00000981); //FR_TX_MUX
-
- /*
- * Reset DDC registers
- */
- _iface->poke32( 34, 0x00000000); //FR_RX_FREQ_0
- _iface->poke32( 44, 0x00000000); //FR_RX_PHASE_0
- _iface->poke32( 35, 0x00000000); //FR_RX_FREQ_1
- _iface->poke32( 45, 0x00000000); //FR_RX_PHASE_1
- _iface->poke32( 36, 0x00000000); //FR_RX_FREQ_2
- _iface->poke32( 46, 0x00000000); //FR_RX_PHASE_2
- _iface->poke32( 37, 0x00000000); //FR_RX_FREQ_3
- _iface->poke32( 47, 0x00000000); //FR_RX_PHASE_3
+ // Normal mode with no loopback or Rx counting
+ _iface->poke32(FR_MODE, 0x00000000);
+ _iface->poke32(FR_DEBUG_EN, 0x00000000);
+ _iface->poke32(FR_RX_SAMPLE_RATE_DIV, 0x00000001);
+ _iface->poke32(FR_TX_SAMPLE_RATE_DIV, 0x00000003);
+ _iface->poke32(FR_DC_OFFSET_CL_EN, 0x0000000f);
+ // Reset offset correction registers
+ _iface->poke32(FR_ADC_OFFSET_0, 0x00000000);
+ _iface->poke32(FR_ADC_OFFSET_1, 0x00000000);
+ _iface->poke32(FR_ADC_OFFSET_2, 0x00000000);
+ _iface->poke32(FR_ADC_OFFSET_3, 0x00000000);
+
+ // Set default for RX format to 16-bit I&Q and no half-band filter bypass
+ _iface->poke32(FR_RX_FORMAT, 0x00000300);
+
+ // Set default for TX format to 16-bit I&Q
+ _iface->poke32(FR_TX_FORMAT, 0x00000000);
}
void usrp1_impl::issue_stream_cmd(const stream_cmd_t &stream_cmd)
diff --git a/host/lib/usrp/usrp1/usrp1_impl.cpp b/host/lib/usrp/usrp1/usrp1_impl.cpp
index a15d0a244..d37eec566 100644
--- a/host/lib/usrp/usrp1/usrp1_impl.cpp
+++ b/host/lib/usrp/usrp1/usrp1_impl.cpp
@@ -70,7 +70,7 @@ static device_addrs_t usrp1_find(const device_addr_t &hint)
}
//wait for things to settle
- boost::this_thread::sleep(boost::posix_time::milliseconds(500));
+ boost::this_thread::sleep(boost::posix_time::milliseconds(1000));
//get descriptors again with serial number
device_list = usb_device_handle::get_device_list();