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author | Ben Hilburn <ben.hilburn@ettus.com> | 2013-09-10 17:44:45 -0700 |
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committer | Josh Blum <josh@joshknows.com> | 2013-09-10 17:44:45 -0700 |
commit | 0159006c4f3ecc39ec2566e96502c423c2de2a8f (patch) | |
tree | fd65164cfcd4edd6fd5a586a56114470f503a9ad | |
parent | 0184989a5f716d99435409279ce5cd1f78d98544 (diff) | |
download | uhd-0159006c4f3ecc39ec2566e96502c423c2de2a8f.tar.gz uhd-0159006c4f3ecc39ec2566e96502c423c2de2a8f.tar.bz2 uhd-0159006c4f3ecc39ec2566e96502c423c2de2a8f.zip |
b200: firmware update changed for FPGA load work
-rw-r--r-- | host/lib/usrp/b200/b200_iface.cpp | 51 | ||||
-rw-r--r-- | host/lib/usrp/b200/b200_iface.hpp | 2 | ||||
-rw-r--r-- | host/lib/usrp/b200/b200_impl.cpp | 9 | ||||
-rw-r--r-- | host/lib/usrp/b200/b200_impl.hpp | 2 | ||||
-rw-r--r-- | host/utils/b2xx_fx3_utils.cpp | 3 |
5 files changed, 52 insertions, 15 deletions
diff --git a/host/lib/usrp/b200/b200_iface.cpp b/host/lib/usrp/b200/b200_iface.cpp index f4a520374..1d05e159c 100644 --- a/host/lib/usrp/b200/b200_iface.cpp +++ b/host/lib/usrp/b200/b200_iface.cpp @@ -51,6 +51,7 @@ const static boost::uint8_t B200_VREQ_GET_FW_HASH = 0x1F; const static boost::uint8_t B200_VREQ_LOOP = 0x22; const static boost::uint8_t B200_VREQ_SPI_WRITE = 0x32; const static boost::uint8_t B200_VREQ_SPI_READ = 0x42; +const static boost::uint8_t B200_VREQ_FPGA_CONFIG = 0x55; const static boost::uint8_t B200_VREQ_FPGA_RESET = 0x62; const static boost::uint8_t B200_VREQ_GPIF_RESET = 0x72; const static boost::uint8_t B200_VREQ_GET_USB = 0x80; @@ -61,10 +62,12 @@ const static boost::uint8_t B200_VREQ_FX3_RESET = 0x99; const static boost::uint8_t B200_VREQ_EEPROM_WRITE = 0xBA; const static boost::uint8_t B200_VREQ_EEPROM_READ = 0xBB; -const static boost::uint8_t FX3_STATE_FPGA_READY = 0x00; -const static boost::uint8_t FX3_STATE_CONFIGURING_FPGA = 0x01; -const static boost::uint8_t FX3_STATE_BUSY = 0x02; -const static boost::uint8_t FX3_STATE_RUNNING = 0x03; +const static boost::uint8_t FX3_STATE_FPGA_READY = 0x01; +const static boost::uint8_t FX3_STATE_CONFIGURING_FPGA = 0x02; +const static boost::uint8_t FX3_STATE_BUSY = 0x03; +const static boost::uint8_t FX3_STATE_RUNNING = 0x04; +const static boost::uint8_t FX3_STATE_UNCONFIGURED = 0x05; +const static boost::uint8_t FX3_STATE_ERROR = 0x06; typedef boost::uint32_t hash_type; @@ -433,7 +436,7 @@ public: unsigned char rx_data[1]; - fx3_control_read(B200_VREQ_GET_STATUS, 0x00, 0x00, rx_data, 1); + fx3_control_read(B200_VREQ_GET_STATUS, 0x00, 0x00, &rx_data[0], 1); return boost::lexical_cast<boost::uint8_t>(rx_data[0]); } @@ -471,15 +474,20 @@ public: (unsigned char*) &hash, 4); } - void load_fpga(const std::string filestring) { + boost::uint32_t load_fpga(const std::string filestring) { boost::uint8_t fx3_state = 0; + boost::uint32_t wait_count; const char *filename = filestring.c_str(); hash_type hash = generate_hash(filename); hash_type loaded_hash; usrp_get_fpga_hash(loaded_hash); - if (hash == loaded_hash) return; + if (hash == loaded_hash) return 0; + + unsigned char out_buff[64]; + memset(out_buff, 0x00, sizeof(out_buff)); + fx3_control_write(B200_VREQ_FPGA_CONFIG, 0, 0, out_buff, 1, 1000); size_t file_size = 0; { @@ -494,23 +502,36 @@ public: throw uhd::io_error("load_fpga: cannot open FPGA input file."); } + wait_count = 0; do { fx3_state = get_fx3_status(); + + if((wait_count >= 500) || (fx3_state == FX3_STATE_ERROR)) { + return fx3_state; + } + boost::this_thread::sleep(boost::posix_time::milliseconds(10)); + + wait_count++; } while(fx3_state != FX3_STATE_FPGA_READY); if (load_img_msg) UHD_MSG(status) << "Loading FPGA image: " \ << filestring << "..." << std::flush; - unsigned char out_buff[64]; - memset(out_buff, 0x00, sizeof(out_buff)); fx3_control_write(B200_VREQ_FPGA_START, 0, 0, out_buff, 1, 1000); + wait_count = 0; do { fx3_state = get_fx3_status(); + + if((wait_count >= 1000) || (fx3_state == FX3_STATE_ERROR)) { + return fx3_state; + } + boost::this_thread::sleep(boost::posix_time::milliseconds(10)); - } while(fx3_state != FX3_STATE_CONFIGURING_FPGA); + wait_count++; + } while(fx3_state != FX3_STATE_CONFIGURING_FPGA); size_t bytes_sent = 0; while(!file.eof()) { @@ -538,14 +559,24 @@ public: file.close(); + wait_count = 0; do { fx3_state = get_fx3_status(); + + if((wait_count >= 500) || (fx3_state == FX3_STATE_ERROR)) { + return fx3_state; + } + boost::this_thread::sleep(boost::posix_time::milliseconds(10)); + + wait_count++; } while(fx3_state != FX3_STATE_RUNNING); usrp_set_fpga_hash(hash); if (load_img_msg) UHD_MSG(status) << "\b\b\b\b done" << std::endl; + + return 0; } private: diff --git a/host/lib/usrp/b200/b200_iface.hpp b/host/lib/usrp/b200/b200_iface.hpp index 6eb20a459..1247d1f86 100644 --- a/host/lib/usrp/b200/b200_iface.hpp +++ b/host/lib/usrp/b200/b200_iface.hpp @@ -59,7 +59,7 @@ public: virtual void set_fpga_reset_pin(const bool reset) = 0; //! load an FPGA image - virtual void load_fpga(const std::string filestring) = 0; + virtual boost::uint32_t load_fpga(const std::string filestring) = 0; //! send SPI through the FX3 virtual void transact_spi( unsigned char *tx_data, size_t num_tx_bits, \ diff --git a/host/lib/usrp/b200/b200_impl.cpp b/host/lib/usrp/b200/b200_impl.cpp index 09c0d3979..1ac5c55fa 100644 --- a/host/lib/usrp/b200/b200_impl.cpp +++ b/host/lib/usrp/b200/b200_impl.cpp @@ -205,7 +205,7 @@ b200_impl::b200_impl(const device_addr_t &device_addr) product_name = "B210"; default_file_name = B210_FPGA_FILE_NAME; break; - default: throw uhd::runtime_error("b200 unknown product code: " + mb_eeprom["product"]); + default: UHD_MSG(error) << "B200 unknown product code: " << mb_eeprom["product"] << std::endl; } } if (default_file_name.empty()) @@ -218,7 +218,12 @@ b200_impl::b200_impl(const device_addr_t &device_addr) device_addr.has_key("fpga")? device_addr["fpga"] : default_file_name ); - _iface->load_fpga(b200_fpga_image); + boost::uint32_t status = _iface->load_fpga(b200_fpga_image); + + if(status != 0) { + throw uhd::runtime_error(str(boost::format("fx3 is in state %1%") % status)); + } + _iface->reset_gpif(); //////////////////////////////////////////////////////////////////// diff --git a/host/lib/usrp/b200/b200_impl.hpp b/host/lib/usrp/b200/b200_impl.hpp index a59e0b977..818906e60 100644 --- a/host/lib/usrp/b200/b200_impl.hpp +++ b/host/lib/usrp/b200/b200_impl.hpp @@ -48,7 +48,7 @@ static const std::string B200_FW_FILE_NAME = "usrp_b200_fw.hex"; static const std::string B200_FPGA_FILE_NAME = "usrp_b200_fpga.bin"; static const std::string B210_FPGA_FILE_NAME = "usrp_b210_fpga.bin"; -static const boost::uint8_t B200_FW_COMPAT_NUM_MAJOR = 0x02; +static const boost::uint8_t B200_FW_COMPAT_NUM_MAJOR = 0x03; static const boost::uint8_t B200_FW_COMPAT_NUM_MINOR = 0x00; static const boost::uint16_t B200_FPGA_COMPAT_NUM = 0x02; static const double B200_LINK_RATE_BPS = (5e9)/8; //practical link rate (5 Gbps) diff --git a/host/utils/b2xx_fx3_utils.cpp b/host/utils/b2xx_fx3_utils.cpp index c99ce1e01..bdd102681 100644 --- a/host/utils/b2xx_fx3_utils.cpp +++ b/host/utils/b2xx_fx3_utils.cpp @@ -35,6 +35,7 @@ #include <boost/functional/hash.hpp> #include <uhd/config.hpp> +#include <uhd/utils/msg.hpp> const static boost::uint16_t FX3_VID = 0x04b4; const static boost::uint16_t FX3_DEFAULT_PID = 0x00f3; @@ -542,7 +543,7 @@ boost::int32_t main(boost::int32_t argc, char *argv[]) { for(std::set<fs::path>::iterator it = globbed.begin(); it != globbed.end(); ++it) { - std::string file = (*it).string(); + std::string file = (*it).filename().string(); if(file.compare(0, 5, "0000:") == 0) { /* Un-bind the device. */ |