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authorNick Foster <nick@nerdnetworks.org>2010-07-28 15:52:00 -0700
committerNick Foster <nick@nerdnetworks.org>2010-07-28 15:52:00 -0700
commited2882e600832f6cb46d05bde7aa49d045e63895 (patch)
treef3546610b05c46609a3f916a99945e449b5db8e3
parentfc99cdcb6c3980e386c5d0124086cbe13e345c97 (diff)
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Fix for SPI SS > 8 bits wide
-rw-r--r--usrp2/opencores/spi/rtl/verilog/spi_defines.v4
1 files changed, 2 insertions, 2 deletions
diff --git a/usrp2/opencores/spi/rtl/verilog/spi_defines.v b/usrp2/opencores/spi/rtl/verilog/spi_defines.v
index a6925918e..25c08214b 100644
--- a/usrp2/opencores/spi/rtl/verilog/spi_defines.v
+++ b/usrp2/opencores/spi/rtl/verilog/spi_defines.v
@@ -102,8 +102,8 @@
// Number of device select signals. Use SPI_SS_NB for fine tuning the
// exact number.
//
-`define SPI_SS_NB_8
-//`define SPI_SS_NB_16
+//`define SPI_SS_NB_8
+`define SPI_SS_NB_16
//`define SPI_SS_NB_24
//`define SPI_SS_NB_32