Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | Replace PIN diode | Matthias P. Braendli | 2023-02-24 | 1 | -3/+3 |
* | ERC and DRC | Matthias P. Braendli | 2023-02-19 | 1 | -2/+2 |
* | Improve MICSPK | Matthias P. Braendli | 2023-02-19 | 1 | -3/+3 |
* | Rework placement and front connector board size, add digi input with VOX PTT | Matthias P. Braendli | 2023-02-19 | 1 | -5/+7 |
* | Add DART-70 logo | Matthias P. Braendli | 2023-02-16 | 1 | -1/+1 |
* | More routing, start moving silkscreen | Matthias P. Braendli | 2023-02-12 | 1 | -3/+3 |
* | Move PA LPF to PA board and other changes | Matthias P. Braendli | 2023-02-08 | 1 | -9/+2 |
* | Place and route PA | Matthias P. Braendli | 2023-02-07 | 1 | -0/+1 |
* | Continue placement and refine schematic | Matthias P. Braendli | 2023-02-07 | 1 | -2/+0 |
* | Place parts of frontend | Matthias P. Braendli | 2023-02-05 | 1 | -1/+1 |
* | More placement | Matthias P. Braendli | 2023-02-05 | 1 | -3/+9 |
* | Continue placement | Matthias P. Braendli | 2023-02-03 | 1 | -4/+6 |
* | Define all footprints | Matthias P. Braendli | 2023-02-02 | 1 | -1/+1 |
* | Calculate diplexer values | Matthias P. Braendli | 2023-01-29 | 1 | -1/+1 |
* | Add initial files for DART-70 | Matthias P. Braendli | 2023-01-08 | 1 | -0/+75 |