aboutsummaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* Separate TX and RX frontendsMatthias P. Braendli2023-02-053-2766/+3336
|
* Place parts of frontendMatthias P. Braendli2023-02-055-1989/+2537
|
* More placementMatthias P. Braendli2023-02-054-1135/+86926
|
* Continue placementMatthias P. Braendli2023-02-036-4196/+5881
|
* Define all footprintsMatthias P. Braendli2023-02-029-950/+28667
|
* AnnotateMatthias P. Braendli2023-02-026-1209/+1589
|
* Run ERCMatthias P. Braendli2023-02-025-4134/+1529
|
* Review componentsMatthias P. Braendli2023-02-016-90939/+5326
|
* Update schematicMatthias P. Braendli2023-01-315-2134/+856
|
* Replace all GNDA by GNDMatthias P. Braendli2023-01-295-547/+3307
|
* Calculate diplexer valuesMatthias P. Braendli2023-01-295-969/+1733
|
* Add rx gain stageMatthias P. Braendli2023-01-246-861/+1642
|
* Add PA lowpass filter valuesMatthias P. Braendli2023-01-243-202/+209
|
* Add blockdiagramMatthias P. Braendli2023-01-241-0/+1444
|
* Add RX filterMatthias P. Braendli2023-01-242-972/+1494
|
* Add connectors for FE, PA and ControlMatthias P. Braendli2023-01-236-3298/+4739
|
* Update TODOsMatthias P. Braendli2023-01-235-935/+196
|
* Add PA_70Matthias P. Braendli2023-01-225-3066/+7832
|
* Change 70MHz filterMatthias P. Braendli2023-01-226-2192/+2192
|
* Add 70MHz frontendMatthias P. Braendli2023-01-214-18/+91855
|
* Schematic workMatthias P. Braendli2023-01-213-738/+1505
|
* Totally rework DART-70 basebandMatthias P. Braendli2023-01-203-5384/+5598
|
* Update schematicMatthias P. Braendli2023-01-196-1131/+2252
|
* Update schematicMatthias P. Braendli2023-01-183-1952/+1291
|
* More schematic workMatthias P. Braendli2023-01-155-3206/+2631
|
* More schematic work on DART-70Matthias P. Braendli2023-01-1513-7794/+10249
|
* Update picardy sw to latest dependenciesMatthias P. Braendli2023-01-145-174/+226
|
* Add hybrid cascodeMatthias P. Braendli2023-01-117-1925/+6343
|
* Add IF gain stageMatthias P. Braendli2023-01-113-236/+1797
|
* Do some schematic changesMatthias P. Braendli2023-01-096-1809/+2624
|
* Add initial files for DART-70Matthias P. Braendli2023-01-0811-0/+24101
|
* Migrate to kicad 6Matthias P. Braendli2022-03-2510-6/+31830
|
* Implement permanent toneMatthias P. Braendli2022-03-043-27/+52
|
* Some eval-clock-cw-tx gui changesMatthias P. Braendli2022-01-231-4/+45
|
* gui: add multiline messages and keyboard shortcutsMatthias P. Braendli2021-06-071-10/+44
|
* Improve automute and switchingMatthias P. Braendli2021-06-061-5/+8
|
* Improve guiMatthias P. Braendli2021-06-061-14/+16
|
* Default to wide Feldhell fontMatthias P. Braendli2021-06-061-1/+1
|
* Improve USB handling and send switch messagesMatthias P. Braendli2021-06-062-47/+53
|
* eval-kit: port variable speed VFO from picardyMatthias P. Braendli2021-06-042-34/+15
|
* eval-clock: set CW freq to 1000HzMatthias P. Braendli2021-06-041-1/+3
|
* Port some fixes from eval-clock to picardyMatthias P. Braendli2021-06-042-5/+12
|
* Implement encoder acceleration and create two UI menusMatthias P. Braendli2021-05-252-109/+120
|
* Fix display update after freq changeMatthias P. Braendli2021-05-251-2/+3
|
* Change sysclk to 32MHz to avoid i2c noise at 144.320MHzMatthias P. Braendli2021-05-251-1/+1
|
* Setup clocks properlyMatthias P. Braendli2021-05-251-1/+3
|
* eval-clock-cw-tx LED is CW beepMatthias P. Braendli2021-05-221-10/+4
|
* Add sequencingMatthias P. Braendli2021-05-172-5/+9
|
* Get FELDHELL to workMatthias P. Braendli2021-04-158-57/+882
|
* Update gitignoreMatthias P. Braendli2021-04-081-0/+9
|
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-25 18:12:16 +0000