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| author | Matthias P. Braendli <matthias.braendli@mpb.li> | 2020-12-22 20:54:41 +0100 |
|---|---|---|
| committer | Matthias P. Braendli <matthias.braendli@mpb.li> | 2020-12-22 20:54:41 +0100 |
| commit | d10cfc09f2a93ce3c85ec94eaee3f14a83e84cad (patch) | |
| tree | fa426016aaa0e362cee27fbc78528ce8b8b55449 /sw | |
| parent | e1ea7ade49ad3f8d7a8667245f96db4773246f4f (diff) | |
| download | picardy-d10cfc09f2a93ce3c85ec94eaee3f14a83e84cad.tar.gz picardy-d10cfc09f2a93ce3c85ec94eaee3f14a83e84cad.tar.bz2 picardy-d10cfc09f2a93ce3c85ec94eaee3f14a83e84cad.zip | |
Switch clock timer to TIM2
Diffstat (limited to 'sw')
| -rw-r--r-- | sw/picardy/Cargo.toml | 2 | ||||
| -rw-r--r-- | sw/picardy/src/main.rs | 20 | ||||
| -rw-r--r-- | sw/pio.txt | 12 |
3 files changed, 22 insertions, 12 deletions
diff --git a/sw/picardy/Cargo.toml b/sw/picardy/Cargo.toml index 5b15949..e773d57 100644 --- a/sw/picardy/Cargo.toml +++ b/sw/picardy/Cargo.toml @@ -15,7 +15,7 @@ cortex-m-semihosting = "0.3" panic-semihosting = "0.5" nb = "1.0" #stm32h7 = { version = "0.9", features = ["stm32h743", "rt"] } -stm32f1xx-hal = { version = "0.7", features = ["rt", "stm32f103"] } +stm32f1xx-hal = { version = "0.7", features = ["rt", "stm32f103", "medium"] } embedded-hal = { version = "0.2", features = [] } shared-bus = { version = "0.2", features = ["cortex-m"] } hd44780-driver = { path = "../deps/hd44780-driver"} diff --git a/sw/picardy/src/main.rs b/sw/picardy/src/main.rs index 8fe0ada..b5efbdd 100644 --- a/sw/picardy/src/main.rs +++ b/sw/picardy/src/main.rs @@ -52,7 +52,7 @@ pub mod log10f; use state::*; -static mut TIMER1: MaybeUninit<CountDownTimer<pac::TIM1>> = MaybeUninit::uninit(); +static mut CLOCK_TIMER: MaybeUninit<CountDownTimer<pac::TIM2>> = MaybeUninit::uninit(); static mut DECISECONDS_COUNTER: MaybeUninit<usize> = MaybeUninit::uninit(); fn time_now() -> usize { @@ -190,13 +190,13 @@ fn main() -> ! { } { - let timer1 = unsafe { &mut *TIMER1.as_mut_ptr() }; - *timer1 = Timer::tim1(dp.TIM1, &clocks, &mut rcc.apb2) - .start_count_down(10.hz()); - timer1.listen(Event::Update); + let timer = unsafe { &mut *CLOCK_TIMER.as_mut_ptr() }; + *timer = Timer::tim2(dp.TIM2, &clocks, &mut rcc.apb1) + .start_count_down(50.hz()); + timer.listen(Event::Update); } - unsafe { pac::NVIC::unmask(pac::Interrupt::TIM1_UP); } + unsafe { pac::NVIC::unmask(pac::Interrupt::TIM2); } loop { let mut update_disp_required = false; @@ -296,16 +296,14 @@ fn main() -> ! { last_encoder_count = encoder_count; - //delay.delay_ms(5u8); - cortex_m::asm::wfi(); } } #[interrupt] -fn TIM1_UP() { - let timer1 = unsafe { &mut *TIMER1.as_mut_ptr() }; - timer1.clear_update_interrupt_flag(); +fn TIM2() { + let timer = unsafe { &mut *CLOCK_TIMER.as_mut_ptr() }; + timer.clear_update_interrupt_flag(); let deciseconds_counter = unsafe { &mut *DECISECONDS_COUNTER.as_mut_ptr() }; *deciseconds_counter += 1; @@ -22,6 +22,9 @@ CW paddle * CW_TIP PB8 * CW_RING PB9 +CW output + * Sidetone PA8 (TIM1 CH1) + Microphone switches * SW1 PA3 ADC12_IN3 * SW2 PA4 ADC12_IN4 @@ -44,3 +47,12 @@ Microphone switches * SCL PB10 default alternate function * SDA PB11 default alternate function + +## Timers + +TIM1 is an advanced control timer, TIM2,3,4 are general purpose + + * TIM1 CW Sidetone PWM output + * TIM2 Clock timer + * TIM3 QEI decoder + * TIM4 |