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| author | Matthias P. Braendli <matthias.braendli@mpb.li> | 2023-02-25 11:17:03 +0100 |
|---|---|---|
| committer | Matthias P. Braendli <matthias.braendli@mpb.li> | 2023-02-25 11:17:03 +0100 |
| commit | 2240e0b6683bcb69b1f477f4449de9cc17314ccd (patch) | |
| tree | ab38c9e75a649faaa466578f0f6fc0b511e3607d /sw/dart-70/.gdbinit | |
| parent | 719fcaf1e0b69eefde2c7c9a572d4c807f8bc7ca (diff) | |
| download | picardy-2240e0b6683bcb69b1f477f4449de9cc17314ccd.tar.gz picardy-2240e0b6683bcb69b1f477f4449de9cc17314ccd.tar.bz2 picardy-2240e0b6683bcb69b1f477f4449de9cc17314ccd.zip | |
Create dart-70 firmware
Diffstat (limited to 'sw/dart-70/.gdbinit')
| -rw-r--r-- | sw/dart-70/.gdbinit | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/sw/dart-70/.gdbinit b/sw/dart-70/.gdbinit new file mode 100644 index 0000000..08b6398 --- /dev/null +++ b/sw/dart-70/.gdbinit @@ -0,0 +1,18 @@ +target remote :3333 + +monitor arm semihosting enable + +# # send captured ITM to the file itm.fifo +# # (the microcontroller SWO pin must be connected to the programmer SWO pin) +# # 8000000 must match the core clock frequency +# monitor tpiu config internal itm.fifo uart off 8000000 + +# # OR: make the microcontroller SWO pin output compatible with UART (8N1) +# # 2000000 is the frequency of the SWO pin +# monitor tpiu config external uart off 8000000 2000000 + +# # enable ITM port 0 +# monitor itm port 0 on + +#load +#step |