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authorMatthias P. Braendli <matthias.braendli@mpb.li>2022-03-25 14:45:34 +0100
committerMatthias P. Braendli <matthias.braendli@mpb.li>2022-03-25 14:45:34 +0100
commitfcbb14426c2a542915a7f870623a90984d841ab8 (patch)
treea760a8c4429d335af6c542a97c917469efcc2712 /kicad/picardy.kicad_pro
parent40658cdf9069e217fab106d13f6f6df6244de2e9 (diff)
downloadpicardy-fcbb14426c2a542915a7f870623a90984d841ab8.tar.gz
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Migrate to kicad 6
Diffstat (limited to 'kicad/picardy.kicad_pro')
-rw-r--r--kicad/picardy.kicad_pro391
1 files changed, 391 insertions, 0 deletions
diff --git a/kicad/picardy.kicad_pro b/kicad/picardy.kicad_pro
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+++ b/kicad/picardy.kicad_pro
@@ -0,0 +1,391 @@
+{
+ "board": {
+ "design_settings": {
+ "defaults": {
+ "board_outline_line_width": 0.05,
+ "copper_line_width": 0.2,
+ "copper_text_italic": false,
+ "copper_text_size_h": 1.5,
+ "copper_text_size_v": 1.5,
+ "copper_text_thickness": 0.3,
+ "copper_text_upright": true,
+ "courtyard_line_width": 0.05,
+ "other_line_width": 0.15,
+ "other_text_italic": false,
+ "other_text_size_h": 0.7999999999999999,
+ "other_text_size_v": 0.7999999999999999,
+ "other_text_thickness": 0.09999999999999999,
+ "other_text_upright": true,
+ "silk_line_width": 0.09999999999999999,
+ "silk_text_italic": false,
+ "silk_text_size_h": 0.7999999999999999,
+ "silk_text_size_v": 0.7999999999999999,
+ "silk_text_thickness": 0.09999999999999999,
+ "silk_text_upright": true
+ },
+ "diff_pair_dimensions": [
+ {
+ "gap": 0.25,
+ "via_gap": 0.25,
+ "width": 0.2
+ }
+ ],
+ "drc_exclusions": [],
+ "rule_severitieslegacy_courtyards_overlap": true,
+ "rule_severitieslegacy_no_courtyard_defined": false,
+ "rules": {
+ "allow_blind_buried_vias": false,
+ "allow_microvias": false,
+ "min_hole_to_hole": 0.25,
+ "min_microvia_diameter": 0.2,
+ "min_microvia_drill": 0.09999999999999999,
+ "min_through_hole_diameter": 0.3,
+ "min_track_width": 0.2,
+ "min_via_diameter": 0.4,
+ "solder_mask_clearance": 0.051,
+ "solder_mask_min_width": 0.25,
+ "solder_paste_clearance": 0.0,
+ "solder_paste_margin_ratio": -0.0
+ },
+ "track_widths": [
+ 0.2,
+ 0.2,
+ 0.3,
+ 0.8
+ ],
+ "via_dimensions": [
+ {
+ "diameter": 0.8,
+ "drill": 0.4
+ },
+ {
+ "diameter": 0.8,
+ "drill": 0.4
+ },
+ {
+ "diameter": 0.8,
+ "drill": 0.6
+ }
+ ]
+ },
+ "layer_presets": []
+ },
+ "boards": [],
+ "cvpcb": {
+ "equivalence_files": []
+ },
+ "erc": {
+ "erc_exclusions": [],
+ "meta": {
+ "version": 0
+ },
+ "pin_map": [
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+ "rule_severities": {
+ "bus_definition_conflict": "error",
+ "bus_entry_needed": "error",
+ "bus_label_syntax": "error",
+ "bus_to_bus_conflict": "error",
+ "bus_to_net_conflict": "error",
+ "different_unit_footprint": "error",
+ "different_unit_net": "error",
+ "duplicate_reference": "error",
+ "duplicate_sheet_names": "error",
+ "extra_units": "error",
+ "global_label_dangling": "warning",
+ "hier_label_mismatch": "error",
+ "label_dangling": "error",
+ "lib_symbol_issues": "warning",
+ "multiple_net_names": "warning",
+ "net_not_bus_member": "warning",
+ "no_connect_connected": "warning",
+ "no_connect_dangling": "warning",
+ "pin_not_connected": "error",
+ "pin_not_driven": "error",
+ "pin_to_pin": "warning",
+ "power_pin_not_driven": "error",
+ "similar_labels": "warning",
+ "unannotated": "error",
+ "unit_value_mismatch": "error",
+ "unresolved_variable": "error",
+ "wire_dangling": "error"
+ }
+ },
+ "libraries": {
+ "pinned_footprint_libs": [],
+ "pinned_symbol_libs": []
+ },
+ "meta": {
+ "filename": "picardy.kicad_pro",
+ "version": 1
+ },
+ "net_settings": {
+ "classes": [
+ {
+ "bus_width": 12.0,
+ "clearance": 0.2,
+ "diff_pair_gap": 0.25,
+ "diff_pair_via_gap": 0.25,
+ "diff_pair_width": 0.2,
+ "line_style": 0,
+ "microvia_diameter": 0.3,
+ "microvia_drill": 0.1,
+ "name": "Default",
+ "pcb_color": "rgba(0, 0, 0, 0.000)",
+ "schematic_color": "rgba(0, 0, 0, 0.000)",
+ "track_width": 0.25,
+ "via_diameter": 0.8,
+ "via_drill": 0.4,
+ "wire_width": 6.0
+ }
+ ],
+ "meta": {
+ "version": 2
+ },
+ "net_colors": null
+ },
+ "pcbnew": {
+ "last_paths": {
+ "gencad": "",
+ "idf": "",
+ "netlist": "",
+ "specctra_dsn": "",
+ "step": "",
+ "vrml": ""
+ },
+ "page_layout_descr_file": ""
+ },
+ "schematic": {
+ "annotate_start_num": 0,
+ "drawing": {
+ "default_line_thickness": 6.0,
+ "default_text_size": 50.0,
+ "field_names": [],
+ "intersheets_ref_own_page": false,
+ "intersheets_ref_prefix": "",
+ "intersheets_ref_short": false,
+ "intersheets_ref_show": false,
+ "intersheets_ref_suffix": "",
+ "junction_size_choice": 3,
+ "label_size_ratio": 0.25,
+ "pin_symbol_size": 0.0,
+ "text_offset_ratio": 0.08
+ },
+ "legacy_lib_dir": "",
+ "legacy_lib_list": [],
+ "meta": {
+ "version": 1
+ },
+ "net_format_name": "",
+ "ngspice": {
+ "fix_include_paths": true,
+ "fix_passive_vals": false,
+ "meta": {
+ "version": 0
+ },
+ "model_mode": 0,
+ "workbook_filename": ""
+ },
+ "page_layout_descr_file": "",
+ "plot_directory": "out",
+ "spice_adjust_passive_values": false,
+ "spice_external_command": "spice \"%I\"",
+ "subpart_first_id": 65,
+ "subpart_id_separator": 0
+ },
+ "sheets": [
+ [
+ "0e32af77-726b-4e11-9f99-2e2484ba9e9b",
+ ""
+ ],
+ [
+ "00000000-0000-0000-0000-00005e4d247a",
+ "Clock"
+ ],
+ [
+ "00000000-0000-0000-0000-00005e2dc494",
+ "Power"
+ ],
+ [
+ "00000000-0000-0000-0000-00005e2fa006",
+ "Control"
+ ],
+ [
+ "00000000-0000-0000-0000-00005e3088f9",
+ "Baseband"
+ ],
+ [
+ "00000000-0000-0000-0000-00005e4c0e28",
+ "Anglian3L"
+ ]
+ ],
+ "text_variables": {}
+}