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authorMatthias P. Braendli <matthias.braendli@mpb.li>2019-05-10 09:30:24 +0200
committerMatthias P. Braendli <matthias.braendli@mpb.li>2019-05-10 09:30:24 +0200
commit3c99ae02b26ffd9ecd64fbefcd72d4f1561316af (patch)
tree718a91cee5060da4ff19f525a7ddae481fb76599 /src
parentd0c10808d2908e2fada3bc13ab5a47260297c74b (diff)
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Show DAC SR when spurious TIM DAC ISR occurs
Diffstat (limited to 'src')
-rw-r--r--src/glutt-o-logique/audio_in.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/glutt-o-logique/audio_in.c b/src/glutt-o-logique/audio_in.c
index f05d5cc..ecf007b 100644
--- a/src/glutt-o-logique/audio_in.c
+++ b/src/glutt-o-logique/audio_in.c
@@ -25,6 +25,7 @@
#include "stm32f4xx_conf.h"
#include "stm32f4xx_gpio.h"
#include "stm32f4xx_adc.h"
+#include "stm32f4xx_dac.h"
#include "GPIO/usart.h"
#include "Core/common.h"
@@ -48,7 +49,8 @@ void TIM6_DAC_IRQHandler()
TIM_ClearITPendingBit(TIM6, TIM_IT_Update);
}
else {
- usart_debug("Spurious TIM6 IRQ: SR=%x\r\n", TIM6->SR);
+ usart_debug("Spurious TIM6 IRQ: SR=%x, DAC SR=%x\r\n",
+ TIM6->SR, DAC->SR);
trigger_fault(FAULT_SOURCE_TIM6_ISR);
}
}