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authorMatthias P. Braendli <matthias.braendli@mpb.li>2017-05-12 17:20:29 +0200
committerMatthias P. Braendli <matthias.braendli@mpb.li>2017-05-12 17:20:29 +0200
commitd57fe2c74f2c9e0a76f4b2c577942837dfac0866 (patch)
tree15d0a9d8dd8323df8eade26f222c8ca02db29ef2 /dpd
parent5733a5c9a1a070ebd30ce55e181d5f0d8917de60 (diff)
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DPD: Set RX sample rate
Diffstat (limited to 'dpd')
-rw-r--r--dpd/README.md6
-rw-r--r--dpd/dpd.ini4
2 files changed, 6 insertions, 4 deletions
diff --git a/dpd/README.md b/dpd/README.md
index 96c4fb0..ec7cec2 100644
--- a/dpd/README.md
+++ b/dpd/README.md
@@ -8,11 +8,13 @@ This folder contains work in progress for digital predistortion. It requires:
- A feedback connection from the power amplifier output, at an appropriate power level for the B200.
Usually this is done with a directional coupler.
- ODR-DabMod with enabled dpd_port, and with a samplerate of 8192000 samples per second.
-- Synchronous=1 so that the USRP has the timestamping set properly.
+- Synchronous=1 so that the USRP has the timestamping set properly, internal refclk and pps
+ are sufficient for this example.
+- A live mux source with TIST enabled.
See dpd/dpd.ini for an example.
TODO
----
-Fix timestamps and test if frame data is valid.
+Implement a PA model that updates the predistorter.
diff --git a/dpd/dpd.ini b/dpd/dpd.ini
index 625df73..910f251 100644
--- a/dpd/dpd.ini
+++ b/dpd/dpd.ini
@@ -14,7 +14,7 @@ transport=tcp
source=localhost:9200
[modulator]
-digital_gain=0.9
+digital_gain=0.8
rate=8192000
[firfilter]
@@ -34,7 +34,7 @@ pps_source=none
behaviour_refclk_lock_lost=ignore
max_gps_holdover_time=600
dpd_port=50055
-rxgain=10
+rxgain=0
[delaymanagement]
; Use synchronous=1 so that the USRP time is set. This works