blob: 5b35286a85d2854127c95062f4a94c9fcd988ddd (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
|
#include <stdio.h>
#include <avr/pgmspace.h>
#include <avr/io.h>
#include <avr/interrupt.h>
#include "delay.h"
/* Definitions for pins */
#define PORTB_PLL_MUXOUT (1 << 0)
#define PORTB_LED_STATUS (1 << 1)
#define PORTB_PLL_LE (1 << 4)
#define PORTB_PLL_DATA (1 << 3)
#define PORTB_PLL_CLK (1 << 2)
void set_pin(int pin, int high)
{
if (high) {
PORTB |= pin;
}
else
{
PORTB &= ~pin;
}
}
void shift_out(uint8_t value)
{
for (uint8_t i = 0; i < 8; i++) {
set_pin(PORTB_PLL_DATA, !!(value & (1 << (7 - i))));
set_pin(PORTB_PLL_CLK, 1);
set_pin(PORTB_PLL_CLK, 0);
}
}
void write_adf4002(uint32_t value)
{
set_pin(PORTB_PLL_LE, 0);
shift_out((value & 0x00FF0000) >> 16);
shift_out((value & 0x0000FF00) >> 8);
shift_out(value & 0x000000FF);
set_pin(PORTB_PLL_LE, 1);
}
volatile uint8_t systick; /* Timer (100Hz increment) */
volatile uint32_t seconds;
/* 200Hz timer interrupt */
ISR(TIM0_COMPA_vect)
{
systick++;
if (systick == 20) {
systick = 0;
seconds += 1;
}
}
static int inittimer(void)
{
/* Start 200Hz system timer */
TCCR0B |= (1 << WGM01); // Configure timer for CTC mode
TIMSK |= (1 << OCIE0A); // enable compare match A interrupt
OCR0A = (uint8_t)(F_CPU / 64 / 50); // Set CTC compare value to 50ms
TCCR0B |= ((1 << CS00) | (1 << CS01)); // Start timer at Fcpu/64
// Enable interrupts
sei();
return 0;
}
int main(void)
{
systick = 0;
seconds = 0;
/* Configure GPIO */
PORTB = PORTB_PLL_LE | PORTB_LED_STATUS;
DDRB = PORTB_PLL_CLK | PORTB_PLL_LE | PORTB_PLL_DATA | PORTB_LED_STATUS;
/* initialise timer interrupt */
inittimer();
delay_ms(120);
// See README.md
const uint32_t r_counter = 400;
const uint32_t n_counter = 1080;
const uint32_t ldp = 1; // 5 consecutive cycles of phase delay less than 15ns before lock det
const uint32_t cpi = 3; // I_CP = 2.5mA
const uint32_t pd_polarity = 1; // positive
const uint32_t muxout = 1; // lock detect, active high
const uint32_t refernce_counter_latch = (ldp << 20) | (r_counter << 2) | 0;
const uint32_t n_counter_latch = (n_counter << 8) | 1;
const uint32_t function_latch = (cpi << 18) | (cpi << 15) | (pd_polarity << 7) | (muxout << 4) | 2;
const uint32_t init_latch = (cpi << 18) | (cpi << 15) | (pd_polarity << 7) | (muxout << 4) | 3;
// ADF4002 Datasheet Page 16
// Device Programming After Initial Statup
// Initialisation Latch Method
write_adf4002(init_latch);
write_adf4002(function_latch);
write_adf4002(refernce_counter_latch);
write_adf4002(n_counter_latch);
while (1) {
/*
const uint32_t second = seconds % 60uL;
const uint32_t minute = seconds / 60uL;
if ((PINB & PORTB_PLL_MUXOUT) == 0) {
delay_ms(600);
}
*/
delay_ms(200);
set_pin(PORTB_LED_STATUS, seconds % 4 < 2);
}
return 0;
}
|
