README.md


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ADF4002 PLL
===========

ADF4002 PLL with 10MHz input and 27MHz output to injection lock the reference crystal of a sat LNB.

![3d view](./20220412_3d.png "3D view of PCB")

Produced at Aisler: https://aisler.net/p/LNQEJMHE

Designed with KiCad.

April 2022 Matthias HB9EGM


Tools:

- ADsimPLL
- `https://leleivre.com/rf_pll_loop_filter_3rd.html`
- `https://github.com/analogdevicesinc/no-OS/tree/master/drivers/frequency/adf4106/`

References:

- https://ea3cno.wordpress.com/2019/09/22/oscilador-pll-de-25-mhz/
- https://destevez.net/2016/08/improving-phase-noise-performance-of-the-df9np-27mhz-pll/