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FPGA4U U-Blox Clock Drift Measurement
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!Measurements Over half an hour, the accumulated error represented by the counter value is slightly less than 1800. The value being positive, it means that the GPS refclk is faster than the oscillator on the FPGA4U. If it were exactly 1800, it would represent a 1Hz error on the 100kHz clock, which would imply 240Hz error on 24MHz (10ppm).
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