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path: root/megacells/fifo_4kx16.bsf
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/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 1991-2006 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.
*/
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	(rect 0 0 160 144)
	(text "fifo_4kx16" (rect 51 1 119 17)(font "Arial" (font_size 10)))
	(text "inst" (rect 8 128 25 140)(font "Arial" ))
	(port
		(pt 0 32)
		(input)
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	)
	(port
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		(input)
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		(text "rdreq" (rect 20 66 44 79)(font "Arial" (font_size 8)))
		(line (pt 0 72)(pt 16 72)(line_width 1))
	)
	(port
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		(input)
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		(text "clock" (rect 26 90 49 103)(font "Arial" (font_size 8)))
		(line (pt 0 96)(pt 16 96)(line_width 1))
	)
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		(input)
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		(output)
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		(text "q[15..0]" (rect 105 26 141 39)(font "Arial" (font_size 8)))
		(line (pt 160 32)(pt 144 32)(line_width 3))
	)
	(port
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		(text "full" (rect 127 50 142 63)(font "Arial" (font_size 8)))
		(line (pt 160 56)(pt 144 56)(line_width 1))
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		(output)
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		(text "usedw[11..0]" (rect 77 82 136 95)(font "Arial" (font_size 8)))
		(line (pt 160 88)(pt 144 88)(line_width 3))
	)
	(drawing
		(text "16 bits x 4096 words" (rect 58 116 144 128)(font "Arial" ))
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)