Thu Oct 6 14:49:17 2016 options author window_size category [GRC Hier Blocks] comment description _enabled True _coordinate (8, 8) _rotation 0 generate_options qt_gui hier_block_src_path .: id phase_difference_x3x0_example max_nouts 0 qt_qss_theme realtime_scheduling run_command {python} -u {filename} run_options prompt run True thread_safe_setters title variable comment _enabled 0 _coordinate (8, 100) _rotation 0 id baseband value 3e9 variable_qtgui_range comment value 10e6 _enabled True _coordinate (200, 112) gui_hint _rotation 0 id rx_base label min_len 200 orient Qt.Horizontal start 10e6 step 50e6 stop 6e9 rangeType float widget counter_slider variable comment _enabled True _coordinate (8, 160) _rotation 0 id samp_rate value 10e6 variable_qtgui_range comment value 10e6 _enabled True _coordinate (168, 240) gui_hint _rotation 0 id tx_base label min_len 200 orient Qt.Horizontal start 10e6 step 50e6 stop 6e9 rangeType float widget counter_slider analog_sig_source_x amp 1 alias comment affinity _enabled 1 freq 100e3 _coordinate (440, 112) _rotation 0 id analog_sig_source_x_1 maxoutbuf 0 minoutbuf 0 offset 0 type complex samp_rate samp_rate waveform analog.GR_COS_WAVE qtgui_time_sink_x autoscale False axislabels True alias comment ctrlpanel False affinity entags True _enabled True _coordinate (768, 404) gui_hint _rotation 0 grid False id qtgui_time_sink_x_0 legend True alpha1 1.0 color1 "blue" label1 marker1 -1 style1 1 width1 1 alpha10 1.0 color10 "blue" label10 marker10 -1 style10 1 width10 1 alpha2 1.0 color2 "red" label2 marker2 -1 style2 1 width2 1 alpha3 1.0 color3 "green" label3 marker3 -1 style3 1 width3 1 alpha4 1.0 color4 "black" label4 marker4 -1 style4 1 width4 1 alpha5 1.0 color5 "cyan" label5 marker5 -1 style5 1 width5 1 alpha6 1.0 color6 "magenta" label6 marker6 -1 style6 1 width6 1 alpha7 1.0 color7 "yellow" label7 marker7 -1 style7 1 width7 1 alpha8 1.0 color8 "dark red" label8 marker8 -1 style8 1 width8 1 alpha9 1.0 color9 "dark green" label9 marker9 -1 style9 1 width9 1 name "" nconnections 1 size 1024 srate samp_rate tr_chan 0 tr_delay 0 tr_level 0.0 tr_mode qtgui.TRIG_MODE_FREE tr_slope qtgui.TRIG_SLOPE_POS tr_tag "" type float update_time 0.10 ylabel Amplitude yunit "" ymax 1 ymin -1 qtgui_time_sink_x autoscale False axislabels True alias comment ctrlpanel False affinity entags True _enabled 0 _coordinate (664, 280) gui_hint _rotation 0 grid False id qtgui_time_sink_x_1 legend True alpha1 1.0 color1 "blue" label1 marker1 -1 style1 1 width1 1 alpha10 1.0 color10 "blue" label10 marker10 -1 style10 1 width10 1 alpha2 1.0 color2 "red" label2 marker2 -1 style2 1 width2 1 alpha3 1.0 color3 "green" label3 marker3 -1 style3 1 width3 1 alpha4 1.0 color4 "black" label4 marker4 -1 style4 1 width4 1 alpha5 1.0 color5 "cyan" label5 marker5 -1 style5 1 width5 1 alpha6 1.0 color6 "magenta" label6 marker6 -1 style6 1 width6 1 alpha7 1.0 color7 "yellow" label7 marker7 -1 style7 1 width7 1 alpha8 1.0 color8 "dark red" label8 marker8 -1 style8 1 width8 1 alpha9 1.0 color9 "dark green" label9 marker9 -1 style9 1 width9 1 name "" nconnections 2 size 1024 srate samp_rate tr_chan 0 tr_delay 0 tr_level 0.0 tr_mode qtgui.TRIG_MODE_FREE tr_slope qtgui.TRIG_SLOPE_POS tr_tag "" type complex update_time 0.10 ylabel Amplitude yunit "" ymax 1 ymin -1 uhd_usrp_sink alias ant0 bw0 0 center_freq0 tx_base norm_gain0 False gain0 15 ant10 bw10 0 center_freq10 0 norm_gain10 False gain10 0 ant11 bw11 0 center_freq11 0 norm_gain11 False gain11 0 ant12 bw12 0 center_freq12 0 norm_gain12 False gain12 0 ant13 bw13 0 center_freq13 0 norm_gain13 False gain13 0 ant14 bw14 0 center_freq14 0 norm_gain14 False gain14 0 ant15 bw15 0 center_freq15 0 norm_gain15 False gain15 0 ant16 bw16 0 center_freq16 0 norm_gain16 False gain16 0 ant17 bw17 0 center_freq17 0 norm_gain17 False gain17 0 ant18 bw18 0 center_freq18 0 norm_gain18 False gain18 0 ant19 bw19 0 center_freq19 0 norm_gain19 False gain19 0 ant1 bw1 0 center_freq1 tx_base norm_gain1 False gain1 15 ant20 bw20 0 center_freq20 0 norm_gain20 False gain20 0 ant21 bw21 0 center_freq21 0 norm_gain21 False gain21 0 ant22 bw22 0 center_freq22 0 norm_gain22 False gain22 0 ant23 bw23 0 center_freq23 0 norm_gain23 False gain23 0 ant24 bw24 0 center_freq24 0 norm_gain24 False gain24 0 ant25 bw25 0 center_freq25 0 norm_gain25 False gain25 0 ant26 bw26 0 center_freq26 0 norm_gain26 False gain26 0 ant27 bw27 0 center_freq27 0 norm_gain27 False gain27 0 ant28 bw28 0 center_freq28 0 norm_gain28 False gain28 0 ant29 bw29 0 center_freq29 0 norm_gain29 False gain29 0 ant2 bw2 0 center_freq2 0 norm_gain2 False gain2 0 ant30 bw30 0 center_freq30 0 norm_gain30 False gain30 0 ant31 bw31 0 center_freq31 0 norm_gain31 False gain31 0 ant3 bw3 0 center_freq3 0 norm_gain3 False gain3 0 ant4 bw4 0 center_freq4 0 norm_gain4 False gain4 0 ant5 bw5 0 center_freq5 0 norm_gain5 False gain5 0 ant6 bw6 0 center_freq6 0 norm_gain6 False gain6 0 ant7 bw7 0 center_freq7 0 norm_gain7 False gain7 0 ant8 bw8 0 center_freq8 0 norm_gain8 False gain8 0 ant9 bw9 0 center_freq9 0 norm_gain9 False gain9 0 clock_rate 0.0 comment affinity dev_addr "addr=192.168.10.2" dev_args "" _enabled 1 _coordinate (816, 104) _rotation 0 id uhd_usrp_sink_1 type fc32 clock_source0 sd_spec0 "A:0 B:0" time_source0 clock_source1 sd_spec1 time_source1 clock_source2 sd_spec2 time_source2 clock_source3 sd_spec3 time_source3 clock_source4 sd_spec4 time_source4 clock_source5 sd_spec5 time_source5 clock_source6 sd_spec6 time_source6 clock_source7 sd_spec7 time_source7 nchan 2 num_mboards 1 samp_rate samp_rate hide_cmd_port False hide_lo_controls True stream_args stream_chans [] sync len_tag_name otw uhd_usrp_source alias ant0 bw0 0 center_freq0 rx_base dc_offs_enb0 "" iq_imbal_enb0 "" norm_gain0 False gain0 15 lo_export0 False lo_source0 internal ant10 bw10 0 center_freq10 0 dc_offs_enb10 "" iq_imbal_enb10 "" norm_gain10 False gain10 0 lo_export10 False lo_source10 internal ant11 bw11 0 center_freq11 0 dc_offs_enb11 "" iq_imbal_enb11 "" norm_gain11 False gain11 0 lo_export11 False lo_source11 internal ant12 bw12 0 center_freq12 0 dc_offs_enb12 "" iq_imbal_enb12 "" norm_gain12 False gain12 0 lo_export12 False lo_source12 internal ant13 bw13 0 center_freq13 0 dc_offs_enb13 "" iq_imbal_enb13 "" norm_gain13 False gain13 0 lo_export13 False lo_source13 internal ant14 bw14 0 center_freq14 0 dc_offs_enb14 "" iq_imbal_enb14 "" norm_gain14 False gain14 0 lo_export14 False lo_source14 internal ant15 bw15 0 center_freq15 0 dc_offs_enb15 "" iq_imbal_enb15 "" norm_gain15 False gain15 0 lo_export15 False lo_source15 internal ant16 bw16 0 center_freq16 0 dc_offs_enb16 "" iq_imbal_enb16 "" norm_gain16 False gain16 0 lo_export16 False lo_source16 internal ant17 bw17 0 center_freq17 0 dc_offs_enb17 "" iq_imbal_enb17 "" norm_gain17 False gain17 0 lo_export17 False lo_source17 internal ant18 bw18 0 center_freq18 0 dc_offs_enb18 "" iq_imbal_enb18 "" norm_gain18 False gain18 0 lo_export18 False lo_source18 internal ant19 bw19 0 center_freq19 0 dc_offs_enb19 "" iq_imbal_enb19 "" norm_gain19 False gain19 0 lo_export19 False lo_source19 internal ant1 bw1 0 center_freq1 rx_base dc_offs_enb1 "" iq_imbal_enb1 "" norm_gain1 False gain1 15 lo_export1 False lo_source1 internal ant20 bw20 0 center_freq20 0 dc_offs_enb20 "" iq_imbal_enb20 "" norm_gain20 False gain20 0 lo_export20 False lo_source20 internal ant21 bw21 0 center_freq21 0 dc_offs_enb21 "" iq_imbal_enb21 "" norm_gain21 False gain21 0 lo_export21 False lo_source21 internal ant22 bw22 0 center_freq22 0 dc_offs_enb22 "" iq_imbal_enb22 "" norm_gain22 False gain22 0 lo_export22 False lo_source22 internal ant23 bw23 0 center_freq23 0 dc_offs_enb23 "" iq_imbal_enb23 "" norm_gain23 False gain23 0 lo_export23 False lo_source23 internal ant24 bw24 0 center_freq24 0 dc_offs_enb24 "" iq_imbal_enb24 "" norm_gain24 False gain24 0 lo_export24 False lo_source24 internal ant25 bw25 0 center_freq25 0 dc_offs_enb25 "" iq_imbal_enb25 "" norm_gain25 False gain25 0 lo_export25 False lo_source25 internal ant26 bw26 0 center_freq26 0 dc_offs_enb26 "" iq_imbal_enb26 "" norm_gain26 False gain26 0 lo_export26 False lo_source26 internal ant27 bw27 0 center_freq27 0 dc_offs_enb27 "" iq_imbal_enb27 "" norm_gain27 False gain27 0 lo_export27 False lo_source27 internal ant28 bw28 0 center_freq28 0 dc_offs_enb28 "" iq_imbal_enb28 "" norm_gain28 False gain28 0 lo_export28 False lo_source28 internal ant29 bw29 0 center_freq29 0 dc_offs_enb29 "" iq_imbal_enb29 "" norm_gain29 False gain29 0 lo_export29 False lo_source29 internal ant2 bw2 0 center_freq2 0 dc_offs_enb2 "" iq_imbal_enb2 "" norm_gain2 False gain2 0 lo_export2 False lo_source2 internal ant30 bw30 0 center_freq30 0 dc_offs_enb30 "" iq_imbal_enb30 "" norm_gain30 False gain30 0 lo_export30 False lo_source30 internal ant31 bw31 0 center_freq31 0 dc_offs_enb31 "" iq_imbal_enb31 "" norm_gain31 False gain31 0 lo_export31 False lo_source31 internal ant3 bw3 0 center_freq3 0 dc_offs_enb3 "" iq_imbal_enb3 "" norm_gain3 False gain3 0 lo_export3 False lo_source3 internal ant4 bw4 0 center_freq4 0 dc_offs_enb4 "" iq_imbal_enb4 "" norm_gain4 False gain4 0 lo_export4 False lo_source4 internal ant5 bw5 0 center_freq5 0 dc_offs_enb5 "" iq_imbal_enb5 "" norm_gain5 False gain5 0 lo_export5 False lo_source5 internal ant6 bw6 0 center_freq6 0 dc_offs_enb6 "" iq_imbal_enb6 "" norm_gain6 False gain6 0 lo_export6 False lo_source6 internal ant7 bw7 0 center_freq7 0 dc_offs_enb7 "" iq_imbal_enb7 "" norm_gain7 False gain7 0 lo_export7 False lo_source7 internal ant8 bw8 0 center_freq8 0 dc_offs_enb8 "" iq_imbal_enb8 "" norm_gain8 False gain8 0 lo_export8 False lo_source8 internal ant9 bw9 0 center_freq9 0 dc_offs_enb9 "" iq_imbal_enb9 "" norm_gain9 False gain9 0 lo_export9 False lo_source9 internal clock_rate 0.0 comment affinity dev_addr "addr=192.168.10.2" dev_args "" _enabled True _coordinate (320, 376) _rotation 0 id uhd_usrp_source_0 maxoutbuf 0 clock_source0 sd_spec0 "A:0 B:0" time_source0 clock_source1 sd_spec1 time_source1 clock_source2 sd_spec2 time_source2 clock_source3 sd_spec3 time_source3 clock_source4 sd_spec4 time_source4 clock_source5 sd_spec5 time_source5 clock_source6 sd_spec6 time_source6 clock_source7 sd_spec7 time_source7 minoutbuf 0 nchan 2 num_mboards 1 type fc32 samp_rate samp_rate hide_cmd_port False hide_lo_controls True stream_args stream_chans [] sync otw usrptest_phase_calc_ccf alias comment affinity _enabled True _coordinate (568, 408) _rotation 0 id usrptest_phase_calc_ccf_0 maxoutbuf 0 minoutbuf 0 analog_sig_source_x_1 uhd_usrp_sink_1 0 0 analog_sig_source_x_1 uhd_usrp_sink_1 0 1 uhd_usrp_source_0 qtgui_time_sink_x_1 0 0 uhd_usrp_source_0 usrptest_phase_calc_ccf_0 0 0 uhd_usrp_source_0 qtgui_time_sink_x_1 1 1 uhd_usrp_source_0 usrptest_phase_calc_ccf_0 1 1 usrptest_phase_calc_ccf_0 qtgui_time_sink_x_0 0 0