/fpga/usrp3/top/n3xx/

• ../
• .gitignore
• Makefile
• Makefile.n3xx.inc
• WrapBufg.vhd
• build_n3xx.tcl
• coregen_dsp
• dboards
• dev_config.json
• doc
• dts
• ip
• mb_clocks.xdc
• mb_pins.xdc
• mb_timing.xdc
• n300_bist_image_core.v
• n300_bist_image_core.vh
• n300_bist_image_core.yml
• n300_bist_static_router.hex
• n300_rfnoc_image_core.v
• n300_rfnoc_image_core.vh
• n300_rfnoc_image_core.yml
• n300_static_router.hex
• n310_10ge.xdc
• n310_1ge.xdc
• n310_aurora.xdc
• n310_bist_image_core.v
• n310_bist_image_core.vh
• n310_bist_image_core.yml
• n310_bist_static_router.hex
• n310_dram.xdc
• n310_rfnoc_image_core.v
• n310_rfnoc_image_core.vh
• n310_rfnoc_image_core.yml
• n310_static_router.hex
• n320_bist_image_core.v
• n320_bist_image_core.vh
• n320_bist_image_core.yml
• n320_bist_static_router.hex
• n320_rfnoc_image_core.v
• n320_rfnoc_image_core.vh
• n320_rfnoc_image_core.yml
• n320_static_router.hex
• n3xx_clocking.v
• n3xx_core.v
• n3xx_db_fe_core.v
• n3xx_mgt_channel_wrapper.v
• n3xx_mgt_io_core.v
• n3xx_mgt_wrapper.v
• n3xx_serial_dac.vhd
• n3xx_serial_dac_arb.vhd
• n3xx_wr.xdc
• n3xx_wr_top.vhd
• setupenv.sh
• sim