#
# Copyright 2021 Ettus Research, a National Instruments Brand
#
# SPDX-License-Identifier: LGPL-3.0-or-later
#
# Description:
#
#   This template should be used for all FPGA builds within the uhddev
#   repository. Exports the FPGA build results (bitfile, device tree and timing
#   report from build directory) as artifacts 'FPGA image <target>'.
#
#   See description for the parameters below.
#

parameters:
  ### Required parameters
  # FPGA target to be built e.g. X410_XG
  - name: target
    type: string

  ### Optional parameters
  # Set to true if the intermediate files from build-<target> directory should
  # be exported for debugging as artifact 'FPGA build <target> (<attempt>)'
  - name: debug
    type: boolean
    default: false
  # Checkout repository in a clean state as described in
  # https://docs.microsoft.com/en-us/azure/devops/pipelines/yaml-schema?view=azure-devops&tabs=schema%2Cparameter-schema#checkout
  - name: clean
    type: boolean
    default: true
  # Default timeout of 4h
  - name: timeout
    type: number
    default: 240

jobs:
- job: FPGA_${{ parameters.target }}
  displayName: 'Build FPGA ${{ parameters.target }}'
  pool:
    name: de-dre-lab
    demands:
    - ettus_fpga_build
    - vivado2019.1
  timeoutInMinutes: ${{ parameters.timeout }}
  steps:
    # Currently limited to be executed in same repo.
    # Removes all unversioned files if necessary.
    # Checkout path defined by single repository case in
    # https://docs.microsoft.com/en-us/azure/devops/pipelines/repos/multi-repo-checkout?view=azure-devops#checkout-path
    - checkout: self
      clean: ${{ parameters.clean }}

    # Remove incomplete IP builds due to aborted previous runs.
    - bash: |
        python3 cleanup_incomplete_ip_builds.py -d fpga/usrp3/top/x400
      workingDirectory: $(Agent.BuildDirectory)/s/fpga/.ci/scripts/
      displayName: 'Incomplete IP Cleanup'

    # Clean export directories and run FPGA build.
    - bash: |
        rm -rf build
        rm -rf build-${{ parameters.target }}
        source setupenv.sh
        make ${{ parameters.target }}
      workingDirectory: $(Agent.BuildDirectory)/s/fpga/usrp3/top/x400
      displayName: 'Build Target'

    # Publish the final result only if all previous steps passed
    - publish: $(Agent.BuildDirectory)/s/fpga/usrp3/top/x400/build
      artifact: 'FPGA image ${{ parameters.target }}'
      displayName: 'Publish FPGA'

    # Publish intermediate files.
    - publish: $(Agent.BuildDirectory)/s/fpga/usrp3/top/x400/build-${{ parameters.target }}
      artifact: 'FPGA build ${{ parameters.target }} ($(System.JobAttempt))'
      condition: and(always(), eq('${{ parameters.debug }}', true))
      displayName: 'Publish Build Directory'

    # Check if FPGA build left any untracked files.
    - ${{ if eq(parameters.debug, true) }}:
      - template: check_clean_repo_steps.yml