From a631a912af5e900c84b366a9c29d1c66f769c98e Mon Sep 17 00:00:00 2001 From: Josh Blum Date: Mon, 1 Oct 2012 17:19:04 -0700 Subject: e1x0: fix RX ADC I and Q inversion --- usrp2/top/E1x0/u1e.v | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) (limited to 'usrp2') diff --git a/usrp2/top/E1x0/u1e.v b/usrp2/top/E1x0/u1e.v index 903ef7a6f..cdf2a7f0d 100644 --- a/usrp2/top/E1x0/u1e.v +++ b/usrp2/top/E1x0/u1e.v @@ -121,7 +121,18 @@ module u1e .D1(1'b1), // 1-bit data input (associated with C1) .R(1'b0), // 1-bit reset input .S(1'b0)); // 1-bit set input - + + // ///////////////////////////////////////////////////////////////////////// + // RX ADC -- handles inversion + + reg [11:0] rx_i, rx_q; + always @(posedge clk_fpga) begin + rx_i <= ~DA; + rx_q <= ~DB; + end + + // ///////////////////////////////////////////////////////////////////////// + // ///////////////////////////////////////////////////////////////////////// // Main U1E Core u1e_core u1e_core(.clk_fpga(clk_fpga), .rst_fpga(~debug_pb), @@ -138,7 +149,7 @@ module u1e .rx_have_data(overo_gpio146), .io_tx(io_tx), .io_rx(io_rx), .tx_i(tx_i), .tx_q(tx_q), - .rx_i(DA), .rx_q(DB), + .rx_i(rx_i), .rx_q(rx_q), .pps_in(PPS_IN), .proc_int(proc_int) ); // ///////////////////////////////////////////////////////////////////////// -- cgit v1.2.3