From 7e085dae07589a6d8f926c8bcb8ae811f4debdd2 Mon Sep 17 00:00:00 2001 From: Matt Ettus Date: Tue, 19 Jul 2011 11:40:11 -0700 Subject: appease the ISE gods --- usrp2/control_lib/atr_controller.v | 2 +- usrp2/control_lib/atr_controller16.v | 2 +- usrp2/top/B100/Makefile | 1 + usrp2/top/E1x0/Makefile | 1 + usrp2/top/USRP2/Makefile | 1 + 5 files changed, 5 insertions(+), 2 deletions(-) (limited to 'usrp2') diff --git a/usrp2/control_lib/atr_controller.v b/usrp2/control_lib/atr_controller.v index 1f8d75d00..ee8b260c5 100644 --- a/usrp2/control_lib/atr_controller.v +++ b/usrp2/control_lib/atr_controller.v @@ -47,7 +47,7 @@ module atr_controller // Removing readback allows ram to be synthesized as LUTs instead of regs //always @(posedge clk_i) // dat_o <= atr_ram[adr_i[5:2]]; - always @* + always dat_o <= 32'd0; always @(posedge clk_i) diff --git a/usrp2/control_lib/atr_controller16.v b/usrp2/control_lib/atr_controller16.v index a2ebd1dde..727f8c630 100644 --- a/usrp2/control_lib/atr_controller16.v +++ b/usrp2/control_lib/atr_controller16.v @@ -50,7 +50,7 @@ module atr_controller16 // Removing readback allows ram to be synthesized as LUTs instead of regs //always @(posedge clk_i) // dat_o <= adr_i[1] ? atr_ram[adr_i[5:2]][31:16] : atr_ram[adr_i[5:2]][15:0]; - always @* + always dat_o <= 16'd0; always @(posedge clk_i) diff --git a/usrp2/top/B100/Makefile b/usrp2/top/B100/Makefile index ca6ec9320..7ab56f9bd 100644 --- a/usrp2/top/B100/Makefile +++ b/usrp2/top/B100/Makefile @@ -69,6 +69,7 @@ TRANSLATE_PROPERTIES = \ "Macro Search Path" "$(shell pwd)/../../coregen/" MAP_PROPERTIES = \ +"Generate Detailed MAP Report" TRUE \ "Allow Logic Optimization Across Hierarchy" TRUE \ "Map to Input Functions" 4 \ "Optimization Strategy (Cover Mode)" Speed \ diff --git a/usrp2/top/E1x0/Makefile b/usrp2/top/E1x0/Makefile index 5d721979b..19fb93ebf 100644 --- a/usrp2/top/E1x0/Makefile +++ b/usrp2/top/E1x0/Makefile @@ -72,6 +72,7 @@ TRANSLATE_PROPERTIES = \ "Macro Search Path" "$(shell pwd)/../../coregen/" MAP_PROPERTIES = \ +"Generate Detailed MAP Report" TRUE \ "Allow Logic Optimization Across Hierarchy" TRUE \ "Map to Input Functions" 4 \ "Optimization Strategy (Cover Mode)" Speed \ diff --git a/usrp2/top/USRP2/Makefile b/usrp2/top/USRP2/Makefile index e9b43491a..8ebb43639 100644 --- a/usrp2/top/USRP2/Makefile +++ b/usrp2/top/USRP2/Makefile @@ -71,6 +71,7 @@ TRANSLATE_PROPERTIES = \ "Macro Search Path" "$(shell pwd)/../../coregen/" MAP_PROPERTIES = \ +"Generate Detailed MAP Report" TRUE \ "Allow Logic Optimization Across Hierarchy" TRUE \ "Map to Input Functions" 4 \ "Optimization Strategy (Cover Mode)" Speed \ -- cgit v1.2.3