From 596fc8d80ed2200f6d4bb597cb7185b63cf0be77 Mon Sep 17 00:00:00 2001 From: ianb Date: Wed, 25 Aug 2010 18:54:51 -0700 Subject: hangedddddddextrnal fifo size to use full NoBL SRAM --- usrp2/top/u2_rev3/u2_core_udp.v | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'usrp2') diff --git a/usrp2/top/u2_rev3/u2_core_udp.v b/usrp2/top/u2_rev3/u2_core_udp.v index b2e540aad..2682926f6 100644 --- a/usrp2/top/u2_rev3/u2_core_udp.v +++ b/usrp2/top/u2_rev3/u2_core_udp.v @@ -665,7 +665,7 @@ module u2_core .dataout(tx_data), .src_rdy_o(tx_src_rdy), .dst_rdy_i(tx_dst_rdy) ); -----/\----- EXCLUDED -----/\----- */ - ext_fifo #(.EXT_WIDTH(18),.INT_WIDTH(36),.RAM_DEPTH(19),.FIFO_DEPTH(8)) + ext_fifo #(.EXT_WIDTH(18),.INT_WIDTH(36),.RAM_DEPTH(19),.FIFO_DEPTH(19)) ext_fifo_i1 ( .int_clk(dsp_clk), -- cgit v1.2.3