From 41f9748a2d856aa3d1fe7b895e38ad3c4b65e11e Mon Sep 17 00:00:00 2001 From: Matt Ettus Date: Wed, 28 Jul 2010 18:59:03 -0700 Subject: sequence number reset upon programming streamid --- usrp2/vrt/vita_tx_deframer.v | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) (limited to 'usrp2/vrt/vita_tx_deframer.v') diff --git a/usrp2/vrt/vita_tx_deframer.v b/usrp2/vrt/vita_tx_deframer.v index 58878790d..f9cd7d00d 100644 --- a/usrp2/vrt/vita_tx_deframer.v +++ b/usrp2/vrt/vita_tx_deframer.v @@ -2,7 +2,7 @@ module vita_tx_deframer #(parameter BASE=0, parameter MAXCHAN=1) - (input clk, input reset, input clear, + (input clk, input reset, input clear, input clear_seqnum, input set_stb, input [7:0] set_addr, input [31:0] set_data, // To FIFO interface of Buffer Pool @@ -68,6 +68,13 @@ module vita_tx_deframer wire eop = eof | (pkt_len==hdr_len); // FIXME would ignoring eof allow larger VITA packets? wire fifo_space; + always @(posedge clk) + if(reset | clear_seqnum) + seqnum_reg <= 4'hF; + else + if((vita_state==VITA_HEADER) & src_rdy_i) + seqnum_reg <= seqnum; + always @(posedge clk) if(reset | clear) begin @@ -75,7 +82,6 @@ module vita_tx_deframer {has_streamid_reg, has_classid_reg, has_secs_reg, has_tics_reg, has_trailer_reg, is_sob_reg, is_eob_reg} <= 0; seqnum_err <= 0; - seqnum_reg <= 0; end else if((vita_state == VITA_STORE) & fifo_space) @@ -107,7 +113,6 @@ module vita_tx_deframer vita_state <= VITA_TICS; else vita_state <= VITA_PAYLOAD; - seqnum_reg <= seqnum; seqnum_err <= ~(seqnum == next_seqnum); end // case: VITA_HEADER VITA_STREAMID : -- cgit v1.2.3